From: Svyatoslav Ryhel <clamor95@gmail.com>
To: "Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Thierry Reding" <thierry.reding@gmail.com>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Sowjanya Komatineni" <skomatineni@nvidia.com>,
"Luca Ceresoli" <luca.ceresoli@bootlin.com>,
"Prashant Gaikwad" <pgaikwad@nvidia.com>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Mikko Perttunen" <mperttunen@nvidia.com>,
"Linus Walleij" <linus.walleij@linaro.org>,
"Mauro Carvalho Chehab" <mchehab@kernel.org>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Svyatoslav Ryhel" <clamor95@gmail.com>,
"Jonas Schwöbel" <jonasschwoebel@yahoo.de>,
"Dmitry Osipenko" <digetx@gmail.com>,
"Charan Pedumuru" <charan.pedumuru@gmail.com>,
"Diogo Ivo" <diogo.ivo@tecnico.ulisboa.pt>,
"Aaron Kling" <webgeek1234@gmail.com>,
"Arnd Bergmann" <arnd@arndb.de>
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-media@vger.kernel.org, linux-clk@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-staging@lists.linux.dev
Subject: [PATCH v4 01/24] pinctrl: tegra20: register csus_mux clock
Date: Wed, 8 Oct 2025 10:30:23 +0300 [thread overview]
Message-ID: <20251008073046.23231-2-clamor95@gmail.com> (raw)
In-Reply-To: <20251008073046.23231-1-clamor95@gmail.com>
Add csus_mux for further use as the csus clock parent, similar to how the
cdev1 and cdev2 muxes are utilized. Additionally, constify the cdev parent
name lists to resolve checkpatch warnings.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
---
drivers/pinctrl/tegra/pinctrl-tegra20.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/pinctrl/tegra/pinctrl-tegra20.c b/drivers/pinctrl/tegra/pinctrl-tegra20.c
index 737fc2000f66..1a1758fd7def 100644
--- a/drivers/pinctrl/tegra/pinctrl-tegra20.c
+++ b/drivers/pinctrl/tegra/pinctrl-tegra20.c
@@ -2222,14 +2222,18 @@ static const struct tegra_pinctrl_soc_data tegra20_pinctrl = {
.drvtype_in_mux = false,
};
-static const char *cdev1_parents[] = {
+static const char * const cdev1_parents[] = {
"dev1_osc_div", "pll_a_out0", "pll_m_out1", "audio",
};
-static const char *cdev2_parents[] = {
+static const char * const cdev2_parents[] = {
"dev2_osc_div", "hclk", "pclk", "pll_p_out4",
};
+static const char * const csus_parents[] = {
+ "pll_c_out1", "pll_p_out2", "pll_p_out3", "vi_sensor",
+};
+
static void tegra20_pinctrl_register_clock_muxes(struct platform_device *pdev)
{
struct tegra_pmx *pmx = platform_get_drvdata(pdev);
@@ -2239,6 +2243,9 @@ static void tegra20_pinctrl_register_clock_muxes(struct platform_device *pdev)
clk_register_mux(NULL, "cdev2_mux", cdev2_parents, 4, 0,
pmx->regs[1] + 0x8, 4, 2, CLK_MUX_READ_ONLY, NULL);
+
+ clk_register_mux(NULL, "csus_mux", csus_parents, 4, 0,
+ pmx->regs[1] + 0x8, 6, 2, CLK_MUX_READ_ONLY, NULL);
}
static int tegra20_pinctrl_probe(struct platform_device *pdev)
--
2.48.1
next prev parent reply other threads:[~2025-10-08 7:31 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-08 7:30 [PATCH v4 00/24] tegra-video: add CSI support for Tegra20 and Tegra30 Svyatoslav Ryhel
2025-10-08 7:30 ` Svyatoslav Ryhel [this message]
2025-10-13 13:12 ` [PATCH v4 01/24] pinctrl: tegra20: register csus_mux clock Linus Walleij
2025-10-14 5:15 ` Mikko Perttunen
2025-10-14 12:03 ` Linus Walleij
2025-10-08 7:30 ` [PATCH v4 02/24] clk: tegra: set CSUS as vi_sensor's gate for Tegra20, Tegra30 and Tegra114 Svyatoslav Ryhel
2025-10-14 5:16 ` Mikko Perttunen
2025-10-08 7:30 ` [PATCH v4 03/24] dt-bindings: clock: tegra30: Add IDs for CSI pad clocks Svyatoslav Ryhel
2025-10-08 7:30 ` [PATCH v4 04/24] clk: tegra30: add CSI pad clock gates Svyatoslav Ryhel
2025-10-08 7:30 ` [PATCH v4 05/24] dt-bindings: display: tegra: document Tegra30 VI and VIP Svyatoslav Ryhel
2025-10-08 7:30 ` [PATCH v4 06/24] staging: media: tegra-video: expand VI and VIP support to Tegra30 Svyatoslav Ryhel
2025-10-08 7:30 ` [PATCH v4 07/24] staging: media: tegra-video: vi: adjust get_selection op check Svyatoslav Ryhel
2025-10-08 7:30 ` [PATCH v4 08/24] staging: media: tegra-video: vi: add flip controls only if no source controls are provided Svyatoslav Ryhel
2025-10-08 7:30 ` [PATCH v4 09/24] staging: media: tegra-video: csi: move CSI helpers to header Svyatoslav Ryhel
2025-10-08 7:30 ` [PATCH v4 10/24] gpu: host1x: convert MIPI to use operation function pointers Svyatoslav Ryhel
2025-10-14 5:35 ` Mikko Perttunen
2025-10-08 7:30 ` [PATCH v4 11/24] dt-bindings: display: tegra: document Tegra132 MIPI calibration device Svyatoslav Ryhel
2025-10-08 21:14 ` Conor Dooley
2025-10-09 5:12 ` Svyatoslav Ryhel
2025-10-09 17:01 ` Conor Dooley
2025-10-08 7:30 ` [PATCH v4 12/24] staging: media: tegra-video: vi: improve logic of source requesting Svyatoslav Ryhel
2025-10-08 7:30 ` [PATCH v4 13/24] staging: media: tegra-video: csi: move avdd-dsi-csi-supply from VI to CSI Svyatoslav Ryhel
2025-10-08 7:30 ` [PATCH v4 14/24] arm64: tegra: move avdd-dsi-csi-supply into CSI node Svyatoslav Ryhel
2025-10-08 7:30 ` [PATCH v4 15/24] staging: media: tegra-video: tegra20: set correct maximum width and height Svyatoslav Ryhel
2025-10-08 7:30 ` [PATCH v4 16/24] staging: media: tegra-video: tegra20: add support for second output of VI Svyatoslav Ryhel
2025-10-08 7:30 ` [PATCH v4 17/24] staging: media: tegra-video: tegra20: adjust format align calculations Svyatoslav Ryhel
2025-10-20 2:34 ` Mikko Perttunen
2025-10-08 7:30 ` [PATCH v4 18/24] staging: media: tegra-video: tegra20: set VI HW revision Svyatoslav Ryhel
2025-10-08 7:30 ` [PATCH v4 19/24] staging: media: tegra-video: tegra20: increase maximum VI clock frequency Svyatoslav Ryhel
2025-10-08 7:30 ` [PATCH v4 20/24] staging: media: tegra-video: tegra20: expand format support with RAW8/10 and YUV422/YUV420p 1X16 Svyatoslav Ryhel
2025-10-08 7:30 ` [PATCH v4 21/24] staging: media: tegra-video: tegra20: adjust luma buffer stride Svyatoslav Ryhel
2025-10-08 7:30 ` [PATCH v4 22/24] dt-bindings: display: tegra: document Tegra20 and Tegra30 CSI Svyatoslav Ryhel
2025-10-08 21:21 ` Conor Dooley
2025-10-08 21:22 ` Conor Dooley
2025-10-09 5:35 ` Svyatoslav Ryhel
2025-10-09 17:02 ` Conor Dooley
2025-10-13 15:53 ` Frank Li
2025-10-08 7:30 ` [PATCH v4 23/24] ARM: tegra: add CSI nodes for Tegra20 and Tegra30 Svyatoslav Ryhel
2025-10-20 2:36 ` Mikko Perttunen
2025-10-08 7:30 ` [PATCH v4 24/24] staging: media: tegra-video: add CSI support " Svyatoslav Ryhel
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20251008073046.23231-2-clamor95@gmail.com \
--to=clamor95@gmail.com \
--cc=airlied@gmail.com \
--cc=arnd@arndb.de \
--cc=charan.pedumuru@gmail.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=digetx@gmail.com \
--cc=diogo.ivo@tecnico.ulisboa.pt \
--cc=dri-devel@lists.freedesktop.org \
--cc=gregkh@linuxfoundation.org \
--cc=jonasschwoebel@yahoo.de \
--cc=jonathanh@nvidia.com \
--cc=krzk+dt@kernel.org \
--cc=linus.walleij@linaro.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-media@vger.kernel.org \
--cc=linux-staging@lists.linux.dev \
--cc=linux-tegra@vger.kernel.org \
--cc=luca.ceresoli@bootlin.com \
--cc=maarten.lankhorst@linux.intel.com \
--cc=mchehab@kernel.org \
--cc=mperttunen@nvidia.com \
--cc=mripard@kernel.org \
--cc=mturquette@baylibre.com \
--cc=pgaikwad@nvidia.com \
--cc=robh@kernel.org \
--cc=sboyd@kernel.org \
--cc=simona@ffwll.ch \
--cc=skomatineni@nvidia.com \
--cc=thierry.reding@gmail.com \
--cc=tzimmermann@suse.de \
--cc=webgeek1234@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).