* rockchip: Make gpiod pin control work and add gpio-ranges
@ 2025-12-05 20:06 Matthijs Kooijman
2025-12-05 20:06 ` [PATCH 1/2] gpio: rockchip: Call pinctrl for gpio config Matthijs Kooijman
2025-12-05 20:06 ` [PATCH 2/2] arm64: dts: rockchip: rk3308: Add gpio-ranges properties Matthijs Kooijman
0 siblings, 2 replies; 3+ messages in thread
From: Matthijs Kooijman @ 2025-12-05 20:06 UTC (permalink / raw)
To: Heiko Stuebner; +Cc: linux-rockchip, linux-gpio
The first patch fixes pin config (e.g. bias) done by userspace via the
gpiod interface, which was not implemented for all rockchip boards.
The second patch is just because I was messing with this code already
and had a test setup ready. It makes gpio-ranges explicit for the rk3308
instead of relying on the (possibly fragile) legacy workaround in
gpio-rockchip to add them automatically.
I think the first patch might be a good candidate to backport to the
stable releases, since it makes a userspace interface functional that
currently silently fails. However, it is not a clear bugfix and I am not
super familiar with the rules for -stable, so if you think this is not
appropriate, feel free to drop the stable Cc from the patch when merging.
Both patches were tested on a rock pi s with a rk3308.
^ permalink raw reply [flat|nested] 3+ messages in thread
* [PATCH 1/2] gpio: rockchip: Call pinctrl for gpio config
2025-12-05 20:06 rockchip: Make gpiod pin control work and add gpio-ranges Matthijs Kooijman
@ 2025-12-05 20:06 ` Matthijs Kooijman
2025-12-05 20:06 ` [PATCH 2/2] arm64: dts: rockchip: rk3308: Add gpio-ranges properties Matthijs Kooijman
1 sibling, 0 replies; 3+ messages in thread
From: Matthijs Kooijman @ 2025-12-05 20:06 UTC (permalink / raw)
To: Heiko Stuebner; +Cc: linux-rockchip, linux-gpio, Matthijs Kooijman, stable
Pinctrl is responsible for bias settings and possibly other pin config,
so call gpiochip_generic_config to apply such config values. This might
also include settings that pinctrl does not support, but then it can
return ENOTSUPP as appropriate.
This makes sure any bias and other pin config set by userspace (via
gpiod) actually takes effect.
Cc: stable@vger.kernel.org
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
---
drivers/gpio/gpio-rockchip.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-rockchip.c b/drivers/gpio/gpio-rockchip.c
index 47174eb3ba76f..106f7f734b4ff 100644
--- a/drivers/gpio/gpio-rockchip.c
+++ b/drivers/gpio/gpio-rockchip.c
@@ -303,7 +303,7 @@ static int rockchip_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
*/
return -ENOTSUPP;
default:
- return -ENOTSUPP;
+ return gpiochip_generic_config(gc, offset, config);
}
}
--
2.48.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [PATCH 2/2] arm64: dts: rockchip: rk3308: Add gpio-ranges properties
2025-12-05 20:06 rockchip: Make gpiod pin control work and add gpio-ranges Matthijs Kooijman
2025-12-05 20:06 ` [PATCH 1/2] gpio: rockchip: Call pinctrl for gpio config Matthijs Kooijman
@ 2025-12-05 20:06 ` Matthijs Kooijman
1 sibling, 0 replies; 3+ messages in thread
From: Matthijs Kooijman @ 2025-12-05 20:06 UTC (permalink / raw)
To: Heiko Stuebner; +Cc: linux-rockchip, linux-gpio, Matthijs Kooijman
This makes the mapping between gpio and pinctrl explicit.
This does not immediately change functionality, because the
gpio-rockchip.c driver has a workaround that defines ranges when they
are not present in DT, but that relies on global gpio numbering (so
AFAICS only works when the rockchip gpio banks are initialized first and
in-order). This prevents the fragility of the workaround for rk3308.
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
---
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 31c25de2d689c..681d2429d541d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -889,6 +889,7 @@ gpio0: gpio@ff220000 {
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO0>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -900,6 +901,7 @@ gpio1: gpio@ff230000 {
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO1>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 32 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -911,6 +913,7 @@ gpio2: gpio@ff240000 {
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO2>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 64 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -922,6 +925,7 @@ gpio3: gpio@ff250000 {
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO3>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 96 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
@@ -933,6 +937,7 @@ gpio4: gpio@ff260000 {
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_GPIO4>;
gpio-controller;
+ gpio-ranges = <&pinctrl 0 128 32>;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
--
2.48.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2025-12-05 20:25 UTC | newest]
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2025-12-05 20:06 rockchip: Make gpiod pin control work and add gpio-ranges Matthijs Kooijman
2025-12-05 20:06 ` [PATCH 1/2] gpio: rockchip: Call pinctrl for gpio config Matthijs Kooijman
2025-12-05 20:06 ` [PATCH 2/2] arm64: dts: rockchip: rk3308: Add gpio-ranges properties Matthijs Kooijman
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