From: Richard Acayan <mailingradian@gmail.com>
To: Bjorn Andersson <andersson@kernel.org>,
Linus Walleij <linusw@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org
Cc: Richard Acayan <mailingradian@gmail.com>
Subject: [PATCH 3/3] arm64: dts: qcom: sdm670: add lpi pinctrl
Date: Mon, 9 Feb 2026 21:11:09 -0500 [thread overview]
Message-ID: <20260210021109.11906-4-mailingradian@gmail.com> (raw)
In-Reply-To: <20260210021109.11906-1-mailingradian@gmail.com>
The Snapdragon 670 has a separate TLMM for audio pins. Add the device
node for it.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
---
arch/arm64/boot/dts/qcom/sdm670.dtsi | 74 ++++++++++++++++++++++++++++
1 file changed, 74 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index b8a8dcbdfbe3..0da3e22ce402 100644
--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi
@@ -2273,5 +2273,79 @@ cpufreq_hw: cpufreq@17d43000 {
#freq-domain-cells = <1>;
};
+
+ lpi_tlmm: pinctrl@62b40000 {
+ compatible = "qcom,sdm670-lpass-lpi-pinctrl";
+ reg = <0 0x62b40000 0 0x20000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&lpi_tlmm 0 0 32>;
+ status = "disabled";
+
+ cdc_pdm_default: cdc-pdm-default-state {
+ clk-pins {
+ pins = "gpio18";
+ function = "pdm_clk";
+ drive-strength = <4>;
+ output-low;
+ };
+
+ sync-pins {
+ pins = "gpio19";
+ function = "pdm_sync";
+ drive-strength = <4>;
+ output-low;
+ };
+
+ tx-pins {
+ pins = "gpio20";
+ function = "pdm_tx";
+ drive-strength = <8>;
+ };
+
+ rx-pins {
+ pins = "gpio21", "gpio23", "gpio25";
+ function = "pdm_rx";
+ drive-strength = <4>;
+ output-low;
+ };
+ };
+
+ cdc_comp_default: cdc-comp-default-state {
+ pins = "gpio22", "gpio24";
+ function = "comp_rx";
+ drive-strength = <4>;
+ };
+
+ cdc_dmic_default: cdc-dmic-default-state {
+ clk1-pins {
+ pins = "gpio26";
+ function = "dmic1_clk";
+ drive-strength = <8>;
+ output-high;
+ };
+
+ clk2-pins {
+ pins = "gpio28";
+ function = "dmic2_clk";
+ drive-strength = <8>;
+ output-high;
+ };
+
+ data1-pins {
+ pins = "gpio27";
+ function = "dmic1_data";
+ drive-strength = <8>;
+ input-enable;
+ };
+
+ data2-pins {
+ pins = "gpio29";
+ function = "dmic2_data";
+ drive-strength = <8>;
+ input-enable;
+ };
+ };
+ };
};
};
--
2.53.0
next prev parent reply other threads:[~2026-02-10 2:10 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-10 2:11 [PATCH 0/3] SDM670 LPASS LPI pin controller support Richard Acayan
2026-02-10 2:11 ` [PATCH 1/3] dt-bindings: pinctrl: qcom: Add SDM670 LPI pinctrl Richard Acayan
2026-02-10 7:41 ` Krzysztof Kozlowski
2026-02-11 2:02 ` Richard Acayan
2026-02-12 7:28 ` Krzysztof Kozlowski
2026-02-10 2:11 ` [PATCH 2/3] pinctrl: qcom: add sdm670 lpi tlmm Richard Acayan
2026-02-10 9:08 ` Konrad Dybcio
2026-02-11 0:35 ` Richard Acayan
2026-02-12 9:07 ` Konrad Dybcio
2026-02-10 2:11 ` Richard Acayan [this message]
2026-02-10 7:42 ` [PATCH 3/3] arm64: dts: qcom: sdm670: add lpi pinctrl Krzysztof Kozlowski
2026-02-11 0:23 ` Richard Acayan
2026-02-12 9:08 ` Konrad Dybcio
2026-03-04 23:52 ` Richard Acayan
2026-02-23 10:14 ` [PATCH 0/3] SDM670 LPASS LPI pin controller support Linus Walleij
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