Linux GPIO subsystem development
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From: Charles Keepax <ckeepax@opensource.cirrus.com>
To: linusw@kernel.org
Cc: brgl@kernel.org, linux-gpio@vger.kernel.org,
	linux-kernel@vger.kernel.org, patches@opensource.cirrus.com
Subject: [PATCH 2/2] pinctrl: cs42l43: Fix polarity on debounce
Date: Fri,  8 May 2026 15:34:53 +0100	[thread overview]
Message-ID: <20260508143453.1886569-2-ckeepax@opensource.cirrus.com> (raw)
In-Reply-To: <20260508143453.1886569-1-ckeepax@opensource.cirrus.com>

The debounce bit sets a bypass on the debounce rather than enabling it,
as such the current polarity of the debounce is set incorrectly. Invert
the polarity to correct this.

Fixes: d5282a539297 ("pinctrl: cs42l43: Add support for the cs42l43")
Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com>
---
 drivers/pinctrl/cirrus/pinctrl-cs42l43.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/cirrus/pinctrl-cs42l43.c b/drivers/pinctrl/cirrus/pinctrl-cs42l43.c
index 3cc1835206077..305233fc19876 100644
--- a/drivers/pinctrl/cirrus/pinctrl-cs42l43.c
+++ b/drivers/pinctrl/cirrus/pinctrl-cs42l43.c
@@ -343,7 +343,7 @@ static int cs42l43_pin_set_db(struct cs42l43_pin *priv, unsigned int pin,
 
 	return regmap_update_bits(priv->regmap, CS42L43_GPIO_CTRL2,
 				  CS42L43_GPIO1_DEGLITCH_BYP_MASK << pin,
-				  !!us << pin);
+				  !us << pin);
 }
 
 static int cs42l43_pin_config_get(struct pinctrl_dev *pctldev,
-- 
2.47.3


      reply	other threads:[~2026-05-08 14:35 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-08 14:34 [PATCH 1/2] pinctrl: cs42l43: Fix leaked pm reference on error path Charles Keepax
2026-05-08 14:34 ` Charles Keepax [this message]

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