From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5D123A6F1A; Wed, 8 Jul 2026 10:15:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783505755; cv=none; b=qhXtJNcEr9FaOQP8MwLm6IIe20/UgHdj7elZ/VYyPG7v1ajBdsg6ldtf8Je5yhMdyA2hogiY0jdmPK1IhEPbRyV6MCDIo3ufvwah/lMtfL7ftrgwma1ATIIs8u5JdTg27YrkYc/ECJ5jOGdCGTEtKNpgpunR/hlT3atJPwTUVtU= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783505755; c=relaxed/simple; bh=ZEM3vY/Rvni5vUWyO125mYZA67WdP+10qWiVEiSpxQ0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=arq8Uc9mHnPYAoL0DYdUvANuckU+ZrobzHQGkzxL9yhBL8OnOUYYCp9dquOJ7gwXY2/wy2YoWOn2oCaIvzzA6T4Bu3hyxNReVW+D5mz2eG5eSVy6e7Jy1GGJVwQsRrOTq2URqE3RzZtcoI/xWQJpqSv0hAevED39aO55zzaKSkk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=SVXDAfn7; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="SVXDAfn7" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id C23964E40CF2; Wed, 8 Jul 2026 10:15:52 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 7B6B960337; Wed, 8 Jul 2026 10:15:52 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id C983B11BC3442; Wed, 8 Jul 2026 12:15:48 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1783505751; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=vK9K/mrLB76x5uzU5c0TcceENMmOeXyS0wuuRlEv6io=; b=SVXDAfn7LdRk2SSamjgET8HABd/s1b80AQUUWICbOH38NBWiFzzKEFb2BWVMlzq7xvL+Vo UehsT6u0NEaPTvZmj72yc9b4DoR05MoKOi1JLyjoAFRJU9scLwM7Kxhgl/KhWcuXq44sXm 6I7uirW+qH6aecJwiYX1xrTj63/PwyQGhKV+tzQTDyCiNdRTtuXgSf30fBJYWJzfjZ8BeF D5ur0Z7qost66nNRmWwWxwv6PbRM4ywA4XzSK1OhdVVeJSmR4t4Dr8c8cgNMI47awdJJtC Xu9lD5bjzAz4ZhbVl8Cr5vEs3F2n4u4OyDSy7+I6CuEk18Gl0x6GA+m7idgp5A== From: Paul Louvel Date: Wed, 08 Jul 2026 12:15:15 +0200 Subject: [PATCH v2 02/10] dt-bindings: soc: fsl: qe: Set #interrupt-cells to 2 to support interrupt type encoding Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260708-qe-pic-gpios-v2-2-1972044cfbd1@bootlin.com> References: <20260708-qe-pic-gpios-v2-0-1972044cfbd1@bootlin.com> In-Reply-To: <20260708-qe-pic-gpios-v2-0-1972044cfbd1@bootlin.com> To: Qiang Zhao , "Christophe Leroy (CS GROUP)" , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin Cc: linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, Paul Louvel , Herve Codina , Krzysztof Kozlowski X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1783505738; l=1330; i=paul.louvel@bootlin.com; s=20260313; h=from:subject:message-id; bh=ZEM3vY/Rvni5vUWyO125mYZA67WdP+10qWiVEiSpxQ0=; b=oblis8PGfDPelQNzHShpnx1O5nbtJdaQ4wl6aqrmAbUO6DPeEoXYQulxvpdHTKaACO7exVse+ 3PvGSviY4A8BR0Iw1bv6Ad4rRllIJP4ofY/+VB2T2B6QM0aFQuoVbOi X-Developer-Key: i=paul.louvel@bootlin.com; a=ed25519; pk=eLW50NT18UAvUT5cAcYf88zNbBCZDLFXuptpyLVhVIU= X-Last-TLS-Session-Version: TLSv1.3 The QUICC Engine port interrupt controller can be configured to generate an interrupt on either a high-to-low transition or any change in the signal state on the related GPIOs. Update the #interrupt-cells property to 2 so consumers can encode interrupt level information. Acked-by: Krzysztof Kozlowski Signed-off-by: Paul Louvel --- .../devicetree/bindings/interrupt-controller/fsl,qe-ports-ic.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,qe-ports-ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,qe-ports-ic.yaml index 2b8e7b9c6d7a..2b7c6b4f0389 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,qe-ports-ic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,qe-ports-ic.yaml @@ -23,7 +23,7 @@ properties: const: 0 '#interrupt-cells': - const: 1 + const: 2 interrupts: maxItems: 1 @@ -45,7 +45,7 @@ examples: reg = <0xc00 0x18>; interrupt-controller; #address-cells = <0>; - #interrupt-cells = <1>; + #interrupt-cells = <2>; interrupts = <74 0x8>; interrupt-parent = <&ipic>; }; -- 2.55.0