From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 72AE842188F; Wed, 8 Jul 2026 10:16:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783505767; cv=none; b=nLnd/Twzs2EiiAJ+xTwdS+ieiH0aZ6I8n7IflnoGaw5fzVV6ausOWC0v/e1nFZhJ1ZoZCjwymh0KzBBqSZgudoInN49mmhEjKrXjIYtRVxVXNP2dAePNtAMAQGaVPKcO5ouptu3K/OEtLYo38rt5sC6v++Clbguft/SdHieKmfo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783505767; c=relaxed/simple; bh=qbFN6lQM89HZuG6ugtMFVH17RNm7kdv+VUWhxlb5SqM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=mg5HVEvT7gGJDNnWokcKalq3VCSb8z6aRaBJwBpf1Ygxgoh9djmIxa7Lqdxl2MOb7t7pbGreCmFIf3SWSgo+L6bQdzod7KiyVre1KKFMaIi/sG7dQrfYgfhwOuAJTDYON0HdkACEJG2mRoMpm46SzsdhIXfcjgXzZExHDYRZybU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=fCCX0GF3; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="fCCX0GF3" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 22B06C8F44A; Wed, 8 Jul 2026 10:16:19 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 3BDB560337; Wed, 8 Jul 2026 10:16:05 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id E8D6411BC3444; Wed, 8 Jul 2026 12:16:01 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1783505763; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=JB1mvrB4ocViz/EnCVmYJRgcL16/T9Vo+kOUUbX1PCg=; b=fCCX0GF3r1atAKNjkeDxYhPkvTp4z6JKt4TZjsJOcQJyK5okRAK9IL6DWl6OKHJbPe2xI4 84tSQxwVQE0Nf5tqjfdNq8qXiLKV5fkX+HHkF7rNDvbW+3hpAcbkL6tJSVa3VlFy9BaSuF NubOkb7KDVjiAOsP9OeJ7NzKKDiRj3CGwB3mtf2deObrTZJDUt9P8PAYJmAHZyGzMQJ5TZ uWb67cpLj/T0wd7PhSZ7bfr6J4Gk2NNqFLWH91Sb5MrEIEAkx4UtLoS16T/f/7rKe1ST9q C047imUXJysQgRdaY+mr0P3UJrKzPTV0BwKZ6k01XWPLPtQNx021H6kY3jR1uA== From: Paul Louvel Date: Wed, 08 Jul 2026 12:15:20 +0200 Subject: [PATCH v2 07/10] soc: fsl: qe: Handle spurious interrupts Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260708-qe-pic-gpios-v2-7-1972044cfbd1@bootlin.com> References: <20260708-qe-pic-gpios-v2-0-1972044cfbd1@bootlin.com> In-Reply-To: <20260708-qe-pic-gpios-v2-0-1972044cfbd1@bootlin.com> To: Qiang Zhao , "Christophe Leroy (CS GROUP)" , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Linus Walleij , Bartosz Golaszewski , Madhavan Srinivasan , Michael Ellerman , Nicholas Piggin Cc: linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, Paul Louvel , Herve Codina X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1783505738; l=868; i=paul.louvel@bootlin.com; s=20260313; h=from:subject:message-id; bh=qbFN6lQM89HZuG6ugtMFVH17RNm7kdv+VUWhxlb5SqM=; b=CMymsLrV3UXKyTvV60x7YvEhpsjWIJ1kirNC7ZqeOCat6nLAC+rIa0j6VEaoXcz/jdt4F5K5y EQElAZoAj3fCtmTw31QAoskFB5cvotXopq6bGUSiCyqrNzHTNUfcKEn X-Developer-Key: i=paul.louvel@bootlin.com; a=ed25519; pk=eLW50NT18UAvUT5cAcYf88zNbBCZDLFXuptpyLVhVIU= X-Last-TLS-Session-Version: TLSv1.3 When no interrupt bits are set in the event register, call handle_bad_irq() to account for the spurious interrupt before exiting the cascade handler. Signed-off-by: Paul Louvel --- drivers/soc/fsl/qe/qe_ports_ic.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/soc/fsl/qe/qe_ports_ic.c b/drivers/soc/fsl/qe/qe_ports_ic.c index bc8b68e5d1a9..29f4334db5a0 100644 --- a/drivers/soc/fsl/qe/qe_ports_ic.c +++ b/drivers/soc/fsl/qe/qe_ports_ic.c @@ -80,9 +80,15 @@ static void qepic_cascade(struct irq_desc *desc) chained_irq_enter(chip, desc); event = ioread32be(data->reg + CEPIER); + if (!event) { + handle_bad_irq(desc); + goto out; + } + for_each_set_bit(bit, &event, 32) generic_handle_domain_irq(data->host, 31 - bit); +out: chained_irq_exit(chip, desc); } -- 2.55.0