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Wed, 22 Jul 2026 12:11:46 +0000 (GMT) Received: from pps.filterd (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (8.18.1.7/8.18.1.7) with ESMTP id 66MCBhTG015003; Wed, 22 Jul 2026 12:11:43 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 4fgj54dv4h-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 22 Jul 2026 12:11:43 +0000 (GMT) Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.18.1.12/8.18.1.12) with ESMTP id 66MCBhBq014978; Wed, 22 Jul 2026 12:11:43 GMT Received: from hu-devc-hyd-u22-c.qualcomm.com (hu-pkumpatl-hyd.qualcomm.com [10.147.245.204]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 66MCBg6j014971 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 22 Jul 2026 12:11:43 +0000 (GMT) Received: by hu-devc-hyd-u22-c.qualcomm.com (Postfix, from userid 3914174) id 7BC39C05; Wed, 22 Jul 2026 17:32:21 +0530 (+0530) From: Prasad Kumpatla To: Bartosz Golaszewski , Bjorn Andersson , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liam Girdwood , Mark Brown , Srinivas Kandagatla , Jaroslav Kysela , Takashi Iwai , Prasad Kumpatla Cc: Krzysztof Kozlowski , Srinivas Kandagatla , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org Subject: [PATCH v5 0/4] ASoC: qcom and pinctrl: add LPASS LPR voting and Hawi LPASS LPI TLMM Date: Wed, 22 Jul 2026 17:32:13 +0530 Message-Id: <20260722120217.3609506-1-prasad.kumpatla@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-ORIG-GUID: -rVn0TcVwgNB4dNySUanitNAZZ1kQ7_- X-Proofpoint-Spam-Info: AW1haW4tMjYwNzIyMDExOSBTYWx0ZWRfXzXMmhm73CP4N ibViCbAr4VD67I8VByEUcNorODS9z95Yl1cawJJrHqzYjahhg6SyzNrEjEJ+FttXa+zemOy+JBx tFOF2XAeMIGQykEoWFIefyHRuGAYhk8= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzIyMDExOSBTYWx0ZWRfX+PxAKXnyvsmc 6dBoznoNftL+3roElyChlfwvMS0VfghtkiOmn+pjWWVJjt3Dbto/tbIsgkr3+KgxWh8657C3N6r R5Fjc6Bkjz/uig2+z3BCXjjotqR14EXh2QffLqVs4ICZjZlUwiOpk3ceMP1QOlqrWvMbUJhB+Dy ox7fuxcD/ZnYgqTipoyqKR/aLpThztRvG4FND6xt6asA/3h3quudtJBRDfUTvO6FrK5o+aClCtU Ie0tHxDDI9b61kvsN3FXPlxluSLxEK4Mw7UU5b2aoqScqW5uVYMyPGYeOkhl+J3KPEfeuipWBlP AYLdEcoKm1YPuyI2Yl4JX4/9f2xxyxCu6yBcb/zu6e81t1XEzN2hdVVqaqbZxBD8PbGOaa/Gyez PwrCUeGV5a4KAJSZDnoUIuRS6uSkC4IV3h0VaZ2f+sVdp9oEKg7S44c6xbmznGZb+lhUpzbaNh2 M9HznZUcV2Fc3JwbrSg== X-Proofpoint-GUID: -rVn0TcVwgNB4dNySUanitNAZZ1kQ7_- X-Authority-Analysis: v=2.4 cv=JuTBas4C c=1 sm=1 tr=0 ts=6a60b383 cx=c_pps a=Ou0eQOY4+eZoSc0qltEV5Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=RAioF0-LDSMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=l57HxYVpV8yVoDQca2EA:9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-22_03,2026-07-21_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 impostorscore=0 suspectscore=0 spamscore=0 adultscore=0 phishscore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607220119 This series adds support for LPASS low-power resource (LPR) voting through PRM and introduces LPASS LPI TLMM pinctrl support for newer platforms such as Hawi. On such platforms, LPASS requires LPR resource voting via PRM to keep the subsystem active. This is handled by adding a new clock ID and support for PARAM_ID_RSC_CPU_LPR in q6prm. Additionally, a new LPASS LPI TLMM block is introduced, requiring a dedicated DT binding and pinctrl driver. Dependencies and merge strategy =============================== The series introduces a new clock identifier, LPASS_HW_LPR_VOTE, in qcom,q6dsp-lpass-ports.h. This clock ID is consumed both by the ASoC LPASS LPR voting support and by the Hawi LPASS LPI DT binding. As a result, the DT binding header update introducing LPASS_HW_LPR_VOTE is the only cross-subsystem dependency in this series. The intended merge strategy is: 1. Merge the LPASS_HW_LPR_VOTE definition in qcom,q6dsp-lpass-ports.h. 2. Merge the ASoC LPASS LPR voting support via the ASoC tree. 3. Merge the Hawi LPASS LPI DT binding and pinctrl driver via the pinctrl tree. Apart from the shared DT binding header update, the ASoC and pinctrl changes are independent and do not introduce additional build-time dependencies between the two subsystems. Changes in v5: - Keep LPASS_HW_LPR_VOTE addition separate from removal of the unused Q6AFE_MAX_CLK_ID define and move the cleanup to a follow-up patch. - Clarify dependency on LPASS_HW_LPR_VOTE and document the intended merge strategy in the cover letter. - Link to v4: https://lore.kernel.org/linux-arm-msm/20260720130511.493295-1-prasad.kumpatla@oss.qualcomm.com/ changes in v4: - Addressed Krzysztof comments, Drop Q6AFE_MAX_CLK_ID from the bindings since it is not used in-tree. - Link to v3: https://lore.kernel.org/linux-arm-msm/20260715133243.3170821-1-prasad.kumpatla@oss.qualcomm.com/ Changes in v3: - Drop the mutex cleanup patch from this series. Since this change is not required for Hawi enablement, keep the current series focused on LPASS LPR voting and LPASS LPI TLMM support, and address the cleanup in a dedicated follow-up series. - As Srini suggested changed LPR_CPU_SS_SLEEP_DISABLED to LPR_CPU_SS_SLEEP_DISABLE in patch#2. - Link to v2: https://lore.kernel.org/all/20260713184549.929569-1-prasad.kumpatla@oss.qualcomm.com/ Changes in v2: - Add mutex cleanup devm-managed in LPASS LPI Pinctrl. - Addressed Bart Comments related to newline and readability. - Link to v1: https://lore.kernel.org/linux-arm-msm/20260708114924.1069239-1-prasad.kumpatla@oss.qualcomm.com/ Prasad Kumpatla (4): ASoC: dt-bindings: qcom: add LPASS LPR vote clock ID ASoC: qcom: q6prm: add support for LPASS LPR resource voting dt-bindings: pinctrl: qcom,hawi-lpass-lpi-pinctrl: Add Hawi LPI pinctrl pinctrl: qcom: hawi-lpass-lpi: add Hawi LPASS LPI TLMM .../pinctrl/qcom,hawi-lpass-lpi-pinctrl.yaml | 109 ++++++++ drivers/pinctrl/qcom/Kconfig | 10 + drivers/pinctrl/qcom/Makefile | 1 + drivers/pinctrl/qcom/pinctrl-hawi-lpass-lpi.c | 244 ++++++++++++++++++ drivers/pinctrl/qcom/pinctrl-lpass-lpi.h | 17 ++ .../sound/qcom,q6dsp-lpass-ports.h | 1 + sound/soc/qcom/qdsp6/q6dsp-lpass-clocks.c | 2 +- sound/soc/qcom/qdsp6/q6prm-clocks.c | 2 + sound/soc/qcom/qdsp6/q6prm.c | 16 +- sound/soc/qcom/qdsp6/q6prm.h | 1 + 10 files changed, 399 insertions(+), 4 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,hawi-lpass-lpi-pinctrl.yaml create mode 100644 drivers/pinctrl/qcom/pinctrl-hawi-lpass-lpi.c base-commit: 290aaf24a551d5a0dce037e3fab30820f9113a10 prerequisite-patch-id: b466b07ba380317b33b3ef98e3789c4a51aa96c1 -- 2.34.1