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Tue, 08 Sep 2026 07:59:02 +0000 (GMT) Received: from pps.filterd (apblrppmta01.qualcomm.com [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (8.18.1.11/8.18.1.11) with ESMTP id 6887ww2Y1372042; Tue, 8 Sep 2026 07:58:58 GMT Received: from hu-devc-hyd-u22-c.qualcomm.com (hu-ks5-hyd.qualcomm.com [10.147.255.18]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTPS id 6887wwYr1372036 (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384 bits=256 verify=NOT); Tue, 08 Sep 2026 07:58:58 +0000 (GMT) Received: by hu-devc-hyd-u22-c.qualcomm.com (Postfix, from userid 4763723) id AB2C8667; Tue, 8 Sep 2026 13:28:56 +0530 (+0530) From: Karthik S To: Bartosz Golaszewski , Bjorn Andersson , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Karthik S Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 0/2] pinctrl: qcom: Add QCS615 LPASS LPI pinctrl support Date: Tue, 8 Sep 2026 13:28:52 +0530 Message-Id: <20260908075854.3015560-1-karthik.s@oss.qualcomm.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Proofpoint-Reinject: loops=2 maxloops=12 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTA4MDA4MiBTYWx0ZWRfX+PcgXWB8fUa8 CFTFrhuDwU7L6+qv6eRrwQE4ExHmEBQmNkje2zwRgvuftSJFxodpxWDKTesdGwGmzny1MPtvfLS xnuCFJOPTYiYiqvhtAmLulbT3XfSYqfqsZzCaWBFC7UgI+1kw2Thp/2vwkxO/D4TGGcw+aCDFBv QJXU+SunDh7cH9L+HcqAlUwLTDZ1Gjgumik2kgXg5UpzcFfts/yeULswuJlzBN7drGlHa1BMw5a zklGURANla2pUqZnm5sVTNgdqjiDWiqe5kh7wAQTV6nLSFfeReHrh+XbjVkqda5EhKUC7IhODbm /v/VMt+Ja4Z093oum851zs3YZVwx7PtWrQ4AUjPYy4htRt0FYAXwepSpjirnDx2L9ltLE1D0FFg /yl3Rcnm9wKvk+gQHE4z2EUZYmVMgcX0xhDaAJhRP0MaNhFThmIMrW/RNdjvoKHN1+XhbfTq8oF 5cYYyeOFYZxI7UMr1CQ== X-Authority-Analysis: v=2.4 cv=Xbe5Co55 c=1 sm=1 tr=0 ts=6a9fc046 cx=c_pps a=Ou0eQOY4+eZoSc0qltEV5Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17 a=VdqzKS8jKosA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=PqG24b8GdM_TS5kaKxcA:9 X-Proofpoint-ORIG-GUID: nnr6COARgPmiKIGrbte3NZT_ETCMiyBd X-Proofpoint-Spam-Info: AW1haW4tMjYwOTA4MDA4MiBTYWx0ZWRfX5xgvUf+crKv3 Xjx/8tS2SvpAoFp64nmy7k0ClWdNIWn9VsHcovZPp8OpBgY8X2FrkUp2T1sFNV6xJpcmiLjS/Vv E97pUxtzU4a5YW16knuG+lBx/aWaDU0= X-Proofpoint-GUID: nnr6COARgPmiKIGrbte3NZT_ETCMiyBd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-08_01,2026-09-07_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 impostorscore=0 lowpriorityscore=0 clxscore=1011 adultscore=0 suspectscore=0 priorityscore=1501 spamscore=0 bulkscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2609080082 This series adds LPASS (Low Power Audio SubSystem) LPI (Low Power Island) pinctrl support for Qualcomm QCS615 SoC. The LPASS LPI TLMM is a dedicated pin controller for audio pins on QCS615 which supports 32 GPIOs (gpio0-gpio31) with mux functions for i2s1, dmic1, dmic2 and spkr_i2s_mclk_a. Karthik S (2): dt-bindings: pinctrl: qcom: Add QCS615 LPASS LPI pinctrl bindings pinctrl: qcom: Add qcs615 lpass lpi pinctrl driver .../qcom,qcs615-lpass-lpi-pinctrl.yaml | 114 +++++++++++ arch/arm64/configs/defconfig | 1 + drivers/pinctrl/qcom/Kconfig | 10 + drivers/pinctrl/qcom/Makefile | 1 + .../pinctrl/qcom/pinctrl-qcs615-lpass-lpi.c | 185 ++++++++++++++++++ 5 files changed, 311 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,qcs615-lpass-lpi-pinctrl.yaml create mode 100644 drivers/pinctrl/qcom/pinctrl-qcs615-lpass-lpi.c -- 2.34.1