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Thu, 17 Sep 2026 16:09:18 -0700 (PDT) Received: from ryzen.lan ([2601:644:8000:7a86::e34]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-39e36116920sm7294763a91.5.2026.09.17.16.09.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 17 Sep 2026 16:09:17 -0700 (PDT) From: Rosen Penev To: linux-gpio@vger.kernel.org Cc: Linus Walleij , Bartosz Golaszewski , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt , linux-kernel@vger.kernel.org (open list), linux-rt-devel@lists.linux.dev (open list:Real-time Linux (PREEMPT_RT):Keyword:PREEMPT_RT) Subject: [PATCHv2] gpio: mvebu: use raw spinlock for MMIO regmaps Date: Thu, 17 Sep 2026 16:09:16 -0700 Message-ID: <20260917230916.118382-1-rosenp@gmail.com> X-Mailer: git-send-email 2.55.0 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The mask/unmask handlers run with the generic irqchip's raw spinlock held and call regmap_read()/regmap_write() on the GPIO regmaps. By default regmap protects itself with a plain spinlock, which becomes a sleeping rt_mutex on CONFIG_PREEMPT_RT; taking it while holding the raw irqchip lock trips might_sleep(), and PROVE_RAW_LOCK_NESTING flags the same nesting on non-RT builds. Configure both GPIO regmaps with .use_raw_spinlock = true so the MMIO accesses stay atomic in hardirq and raw-locked context. Assisted-by: LLM Signed-off-by: Rosen Penev Reviewed-by: Sebastian Andrzej Siewior --- v2: remove inline comment drivers/gpio/gpio-mvebu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index 267e6d5bacd0..92ce02441cc9 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c @@ -603,6 +603,7 @@ static const struct regmap_config mvebu_gpio_regmap_config = { .reg_bits = 32, .reg_stride = 4, .val_bits = 32, + .use_raw_spinlock = true, }; static const struct regmap_config mvebu_gpio_percpu_regmap_config = { @@ -610,6 +611,7 @@ static const struct regmap_config mvebu_gpio_percpu_regmap_config = { .reg_bits = 32, .reg_stride = 4, .val_bits = 32, + .use_raw_spinlock = true, }; static const struct regmap_config mvebu_pwm_regmap_config = { -- 2.55.0