From: "Jernej Škrabec" <jernej.skrabec@gmail.com>
To: Chen-Yu Tsai <wens@csie.org>,
Linus Walleij <linus.walleij@linaro.org>,
Samuel Holland <samuel@sholland.org>
Cc: Samuel Holland <samuel@sholland.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Maxime Ripard <mripard@kernel.org>, Ondrej Jirman <x@xff.cz>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-sunxi@lists.linux.dev
Subject: Re: [PATCH 4/6] pinctrl: sunxi: Refactor register/offset calculation
Date: Sat, 02 Jul 2022 22:29:35 +0200 [thread overview]
Message-ID: <2116734.Icojqenx9y@jernej-laptop> (raw)
In-Reply-To: <20220626021148.56740-5-samuel@sholland.org>
Dne nedelja, 26. junij 2022 ob 04:11:45 CEST je Samuel Holland napisal(a):
> Starting with the D1/D1s/T113 SoC, Allwinner changed the layout of the
> pinctrl registers. This new layout widens the drive level field, which
> affects the pull register offset and the overall bank size.
>
> As a first step to support this, combine the register and offset
> calculation functions, and refactor the math to depend on one constant
> for field widths instead of three. This minimizes the code size impact
> of making some of the factors dynamic.
>
> While rewriting these functions, move them to the implementation file,
> since that is the only file where they are used. And make the comment
> more generic, without mentioning specific offsets/sizes.
>
> The callers are updated to expect a shifted mask, and to use consistent
> terminology (reg/shift/mask/val).
>
> Signed-off-by: Samuel Holland <samuel@sholland.org>
Nice cleanup.
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Best regards,
Jernej
next prev parent reply other threads:[~2022-07-02 20:29 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-26 2:11 [PATCH 0/6] pinctrl: sunxi: Allwinner D1/D1s support Samuel Holland
2022-06-26 2:11 ` [PATCH 1/6] dt-bindings: pinctrl: Add compatibles for Allwinner D1/D1s Samuel Holland
2022-06-26 10:37 ` Krzysztof Kozlowski
2022-07-01 13:02 ` Heiko Stuebner
2022-07-11 8:58 ` Linus Walleij
2022-07-12 10:14 ` Samuel Holland
2022-07-13 2:56 ` Samuel Holland
2022-06-26 2:11 ` [PATCH 2/6] pinctrl: sunxi: Add I/O bias setting for H6 R-PIO Samuel Holland
2022-06-27 20:34 ` Jernej Škrabec
2022-06-28 3:18 ` Samuel Holland
2022-07-01 13:03 ` Heiko Stuebner
2022-06-26 2:11 ` [PATCH 3/6] pinctrl: sunxi: Support the 2.5V I/O bias mode Samuel Holland
2022-06-27 20:43 ` Jernej Škrabec
2022-06-28 3:29 ` Samuel Holland
2022-07-02 19:48 ` Jernej Škrabec
2022-07-01 13:04 ` Heiko Stuebner
2022-06-26 2:11 ` [PATCH 4/6] pinctrl: sunxi: Refactor register/offset calculation Samuel Holland
2022-07-01 13:07 ` Heiko Stuebner
2022-07-02 20:29 ` Jernej Škrabec [this message]
2022-06-26 2:11 ` [PATCH 5/6] pinctrl: sunxi: Make some layout parameters dynamic Samuel Holland
2022-07-01 13:09 ` Heiko Stuebner
2022-07-02 20:33 ` Jernej Škrabec
2022-06-26 2:11 ` [PATCH 6/6] pinctrl: sunxi: Add driver for Allwinner D1/D1s Samuel Holland
2022-07-01 13:13 ` Heiko Stuebner
2022-07-01 15:16 ` Samuel Holland
2022-07-02 14:47 ` Andre Przywara
2022-07-02 15:43 ` Samuel Holland
2022-07-04 9:42 ` Andre Przywara
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