* [PATCH] pinctrl: rockchip: enable clock when reading pin direction register
@ 2017-12-12 17:43 Brian Norris
2017-12-12 18:19 ` Heiko Stuebner
2017-12-20 8:01 ` Linus Walleij
0 siblings, 2 replies; 3+ messages in thread
From: Brian Norris @ 2017-12-12 17:43 UTC (permalink / raw)
To: Linus Walleij, Heiko Stuebner
Cc: linux-gpio, linux-arm-kernel, linux-rockchip, linux-kernel,
Doug Anderson, Brian Norris
We generally leave the GPIO clock disabled, unless an interrupt is
requested or we're accessing IO registers. We forgot to do this for the
->get_direction() callback, which means we can sometimes [1] get
incorrect results [2] from, e.g., /sys/kernel/debug/gpio.
Enable the clock, so we get the right results!
[1] Sometimes, because many systems have 1 or mor interrupt requested on
each GPIO bank, so they always leave their clock on.
[2] Incorrect, meaning the register returns 0, and so we interpret that
as "input".
Signed-off-by: Brian Norris <briannorris@chromium.org>
---
drivers/pinctrl/pinctrl-rockchip.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 2ba17548ad5b..073de6a9ed34 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -2014,8 +2014,16 @@ static int rockchip_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
{
struct rockchip_pin_bank *bank = gpiochip_get_data(chip);
u32 data;
+ int ret;
+ ret = clk_enable(bank->clk);
+ if (ret < 0) {
+ dev_err(bank->drvdata->dev,
+ "failed to enable clock for bank %s\n", bank->name);
+ return ret;
+ }
data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR);
+ clk_disable(bank->clk);
return !(data & BIT(offset));
}
--
2.15.1.424.g9478a66081-goog
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] pinctrl: rockchip: enable clock when reading pin direction register
2017-12-12 17:43 [PATCH] pinctrl: rockchip: enable clock when reading pin direction register Brian Norris
@ 2017-12-12 18:19 ` Heiko Stuebner
2017-12-20 8:01 ` Linus Walleij
1 sibling, 0 replies; 3+ messages in thread
From: Heiko Stuebner @ 2017-12-12 18:19 UTC (permalink / raw)
To: Brian Norris
Cc: Linus Walleij, linux-gpio, linux-arm-kernel, linux-rockchip,
linux-kernel, Doug Anderson
Hi Brian,
Am Dienstag, 12. Dezember 2017, 09:43:43 CET schrieb Brian Norris:
> We generally leave the GPIO clock disabled, unless an interrupt is
> requested or we're accessing IO registers. We forgot to do this for the
> ->get_direction() callback, which means we can sometimes [1] get
> incorrect results [2] from, e.g., /sys/kernel/debug/gpio.
>
> Enable the clock, so we get the right results!
>
> [1] Sometimes, because many systems have 1 or mor interrupt requested on
> each GPIO bank, so they always leave their clock on.
>
> [2] Incorrect, meaning the register returns 0, and so we interpret that
> as "input".
>
> Signed-off-by: Brian Norris <briannorris@chromium.org>
thanks for catching this and it looks good to me, so
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] pinctrl: rockchip: enable clock when reading pin direction register
2017-12-12 17:43 [PATCH] pinctrl: rockchip: enable clock when reading pin direction register Brian Norris
2017-12-12 18:19 ` Heiko Stuebner
@ 2017-12-20 8:01 ` Linus Walleij
1 sibling, 0 replies; 3+ messages in thread
From: Linus Walleij @ 2017-12-20 8:01 UTC (permalink / raw)
To: Brian Norris
Cc: Heiko Stuebner, linux-gpio, Linux ARM,
open list:ARM/Rockchip SoC..., linux-kernel@vger.kernel.org,
Doug Anderson
On Tue, Dec 12, 2017 at 6:43 PM, Brian Norris <briannorris@chromium.org> wrote:
> We generally leave the GPIO clock disabled, unless an interrupt is
> requested or we're accessing IO registers. We forgot to do this for the
> ->get_direction() callback, which means we can sometimes [1] get
> incorrect results [2] from, e.g., /sys/kernel/debug/gpio.
>
> Enable the clock, so we get the right results!
>
> [1] Sometimes, because many systems have 1 or mor interrupt requested on
> each GPIO bank, so they always leave their clock on.
>
> [2] Incorrect, meaning the register returns 0, and so we interpret that
> as "input".
>
> Signed-off-by: Brian Norris <briannorris@chromium.org>
Patch applied with Heiko's review tag.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 3+ messages in thread
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2017-12-12 18:19 ` Heiko Stuebner
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