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Thu, 04 Feb 2021 06:05:28 -0800 (PST) Message-ID: <2773b77f3df3f36ab1570d2db07b386cac7cb761.camel@gmail.com> Subject: Re: [PATCH v3 1/7] gpio: gpio-ep93xx: fix BUG_ON port F usage From: Alexander Sverdlin To: nikita.shubin@maquefel.me, Andy Shevchenko Cc: Linus Walleij , Bartosz Golaszewski , "open list:GPIO SUBSYSTEM" , Linux Kernel Mailing List Date: Thu, 04 Feb 2021 15:05:28 +0100 In-Reply-To: <639331612446874@mail.yandex.ru> References: <20210128122123.25341-1-nikita.shubin@maquefel.me> <20210128122123.25341-2-nikita.shubin@maquefel.me> <28201612442592@mail.yandex.ru> <164d778019f68dd024cb42f869e7d967618514cb.camel@gmail.com> <639331612446874@mail.yandex.ru> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.38.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Hi Nikita, On Thu, 2021-02-04 at 17:00 +0300, nikita.shubin@maquefel.me wrote: > >  I considered your offer of using array with holes. > >    > >  It looks pretty ugly to me, couse it leads to bloated arrays: > >    > >  static unsigned char gpio_int_unmasked[EP93XX_GPIO_CHIP_NUM]; > >  static unsigned char gpio_int_enabled[EP93XX_GPIO_CHIP_NUM]; > >  static unsigned char gpio_int_type1[EP93XX_GPIO_CHIP_NUM]; > >  static unsigned char gpio_int_type2[EP93XX_GPIO_CHIP_NUM]; > >  static unsigned char gpio_int_debounce[EP93XX_GPIO_CHIP_NUM]; > >    > >  /* Port ordering is: A B F */ > >  static const u8 int_type1_register_offset[EP93XX_GPIO_CHIP_NUM]    = { 0x90, 0xac, 0x0, 0x0, 0x0, 0x4c }; > >  static const u8 int_type2_register_offset[EP93XX_GPIO_CHIP_NUM]    = { 0x94, 0xb0, 0x0, 0x0, 0x0, 0x50 }; > >  static const u8 eoi_register_offset[EP93XX_GPIO_CHIP_NUM]    = { 0x98, 0xb4, 0x0, 0x0, 0x0, 0x54 }; > >  static const u8 int_en_register_offset[EP93XX_GPIO_CHIP_NUM]    = { 0x9c, 0xb8, 0x0, 0x0, 0x0, 0x58 }; > >  static const u8 int_debounce_register_offset[EP93XX_GPIO_CHIP_NUM]    = { 0xa8, 0xc4, 0x0, 0x0, 0x0, 0x64 }; > >    > >  Is this really the thing we want ? > > Even in this form it's less error-prone than to have two > index-spaces, and hidden conversion from one numbering scheme > to other. > > Alternatives that I see are: > 1. > https://gcc.gnu.org/onlinedocs/gcc/Designated-Inits.html > > 2. > Embedd the necessary values into struct ep93xx_gpio_bank. > This option can probably simplify the handling of the names > for irq chips as well.  > Thank you very much for your comments, and how about a 3rd option ? : >   > It also makes easier to add 'struct irqchip' in following patch. >  struct ep93xx_gpio_irq_chip { >        u8 irq_offset; >        u8 int_unmasked; >        u8 int_enabled; >        u8 int_type1; >        u8 int_type2; >        u8 int_debounce; > }; >   > struct ep93xx_gpio_chip { >        struct gpio_chip                gc; >        struct ep93xx_gpio_irq_chip     *eic; > }; >   > struct ep93xx_gpio { >        void __iomem            *base; >        struct ep93xx_gpio_chip gc[8]; > }; > > static const u8 int_register_offset[8]   = { 0x90, 0xac, [5] = 0x4c }; > #define EP93XX_INT_TYPE1_OFFSET        0x00 > #define EP93XX_INT_TYPE2_OFFSET        0x04 > #define EP93XX_INT_EOI_OFFSET          0x08 > #define EP93XX_INT_EN_OFFSET           0x0c > #define EP93XX_INT_STATUS_OFFSET       0x10 > #define EP93XX_INT_RAW_STATUS_OFFSET   0x14 > #define EP93XX_INT_DEBOUNCE_OFFSET     0x18 Makes sense to me. -- Alexander Sverdlin.