From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C5F3C433B4 for ; Sat, 10 Apr 2021 21:10:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 4DD81610D1 for ; Sat, 10 Apr 2021 21:10:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234874AbhDJVLB (ORCPT ); Sat, 10 Apr 2021 17:11:01 -0400 Received: from gloria.sntech.de ([185.11.138.130]:38768 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232659AbhDJVLA (ORCPT ); Sat, 10 Apr 2021 17:11:00 -0400 Received: from ip5f5aa64a.dynamic.kabel-deutschland.de ([95.90.166.74] helo=diego.localnet) by gloria.sntech.de with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1lVKsI-0001bv-Bg; Sat, 10 Apr 2021 23:10:38 +0200 From: Heiko =?ISO-8859-1?Q?St=FCbner?= To: Linus Walleij , Peter Geis Cc: Ezequiel Garcia , Jianqun Xu , Catalin Marinas , Will Deacon , "open list:GPIO SUBSYSTEM" , "open list:ARM/Rockchip SoC..." Subject: Re: [PATCH v4] pinctrl: rockchip: add support for rk3568 Date: Sat, 10 Apr 2021 23:10:37 +0200 Message-ID: <3262311.AJdgDx1Vlc@diego> In-Reply-To: References: <20210304013342.1106361-1-jay.xu@rock-chips.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Hi Peter, Am Samstag, 10. April 2021, 20:30:52 CEST schrieb Peter Geis: > Good Afternoon, > > I'm currently working on the rk3566 early bringup support in mainline > and encountered an issue with this patch set. > Unfortunately in the rk3568/rk3566 the gpio registers switched to the > (16 bits write enable / 16 bits config) register format that other > rockchip registers use. > This differs from previous chips where all 32 bits were used for gpio > configuration. > The patch fails to account for this, which causes all gpios to fail to function. > > For clarity, this only affects GPIO_SWPORT_DR and GPIO_SWPORT_DDR. > > I'm currently working on a patch to fix this issue, but I know that > you are planning on breaking out the gpio functions into a separate > driver and wanted to make you aware of this immediately. just pointing to Jianqun's series providing the gpio controller support: https://lore.kernel.org/r/20210324064704.950104-1-jay.xu@rock-chips.com which introduces the necessary writemask-handling but seems to need an update, judging by Ezequiel's reply to it. Heiko > Very Respectfully, > Peter Geis > > On Fri, Apr 9, 2021 at 8:38 AM Linus Walleij wrote: > > > > On Fri, Apr 9, 2021 at 6:17 AM Ezequiel Garcia > > wrote: > > > > > Seems we are missing the dt-bindings for the new compatible string > > > "rockchip,rk3568-pinctrl". Is there a patch for it somewhere? > > > > Nope please send one :) > > > > Yours, > > Linus Walleij > > > > _______________________________________________ > > Linux-rockchip mailing list > > Linux-rockchip@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-rockchip >