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* [PATCH 0/6] Add basic support for support for Rockchip RK1108 SOC
@ 2016-11-03 12:26 Andy Yan
  2016-11-03 12:34 ` [PATCH 2/6] pinctrl: rockchip: add support for rk1108 Andy Yan
       [not found] ` <1478175975-11779-1-git-send-email-andy.yan-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
  0 siblings, 2 replies; 8+ messages in thread
From: Andy Yan @ 2016-11-03 12:26 UTC (permalink / raw)
  To: heiko
  Cc: linus.walleij, robh+dt, shawn.lin, linux-clk, briannorris,
	linux-rockchip, devicetree, mturquette, sboyd, linux-gpio, linux,
	linux-arm-kernel, ulf.hansson, linux-kernel, mark.rutland,
	elaine.zhang, Andy Yan


RK1108 is embedded with an ARM Cortex-A7 single core and a DSP core.
It is designed for varies application scenario such as car DVR, sports
DV, secure camera and UAV camera.
This patch series add basic support for it, which can boot a board with
initramfs into shell.
More new feathers will come soon.


Andy Yan (4):
  pinctrl: rockchip: add support for rk1108
  ARM: dts: add basic support for Rockchip RK1108 SOC
  ARM: add low level debug uart for rk1108
  ARM: dts: rockchip: add rockchip RK1108 Evaluation board

Shawn Lin (2):
  dt-bindings: rockchip-dw-mshc: add RK1108 dw-mshc description
  clk: rockchip: add clock controller for rk1108

 Documentation/devicetree/bindings/arm/rockchip.txt |   3 +
 .../devicetree/bindings/mmc/rockchip-dw-mshc.txt   |   1 +
 arch/arm/Kconfig.debug                             |  30 ++
 arch/arm/boot/dts/Makefile                         |   1 +
 arch/arm/boot/dts/rk1108-evb.dts                   |  69 +++
 arch/arm/boot/dts/rk1108.dtsi                      | 420 +++++++++++++++++++
 arch/arm/mach-rockchip/rockchip.c                  |   1 +
 drivers/clk/rockchip/Makefile                      |   1 +
 drivers/clk/rockchip/clk-rk1108.c                  | 463 +++++++++++++++++++++
 drivers/clk/rockchip/clk.h                         |  14 +
 drivers/pinctrl/pinctrl-rockchip.c                 |  27 +-
 include/dt-bindings/clock/rk1108-cru.h             | 308 ++++++++++++++
 12 files changed, 1337 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/rk1108-evb.dts
 create mode 100644 arch/arm/boot/dts/rk1108.dtsi
 create mode 100644 drivers/clk/rockchip/clk-rk1108.c
 create mode 100644 include/dt-bindings/clock/rk1108-cru.h

-- 
2.7.4



^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH 2/6] pinctrl: rockchip: add support for rk1108
  2016-11-03 12:26 [PATCH 0/6] Add basic support for support for Rockchip RK1108 SOC Andy Yan
@ 2016-11-03 12:34 ` Andy Yan
  2016-11-03 15:55   ` Heiko Stübner
                     ` (2 more replies)
       [not found] ` <1478175975-11779-1-git-send-email-andy.yan-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
  1 sibling, 3 replies; 8+ messages in thread
From: Andy Yan @ 2016-11-03 12:34 UTC (permalink / raw)
  To: heiko
  Cc: david.wu, linux-gpio, linux-rockchip, linus.walleij,
	linux-arm-kernel, linux-kernel, Andy Yan

Add basic support for rk1108 soc

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
---

 drivers/pinctrl/pinctrl-rockchip.c | 27 ++++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 49bf7dc..9f324b1 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -59,6 +59,7 @@
 #define GPIO_LS_SYNC		0x60
 
 enum rockchip_pinctrl_type {
+	RK1108,
 	RK2928,
 	RK3066B,
 	RK3188,
@@ -1123,6 +1124,7 @@ static int rockchip_get_pull(struct rockchip_pin_bank *bank, int pin_num)
 		return !(data & BIT(bit))
 				? PIN_CONFIG_BIAS_PULL_PIN_DEFAULT
 				: PIN_CONFIG_BIAS_DISABLE;
+	case RK1108:
 	case RK3188:
 	case RK3288:
 	case RK3368:
@@ -1169,6 +1171,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
 
 		spin_unlock_irqrestore(&bank->slock, flags);
 		break;
+	case RK1108:
 	case RK3188:
 	case RK3288:
 	case RK3368:
@@ -1358,6 +1361,7 @@ static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
 					pull == PIN_CONFIG_BIAS_DISABLE);
 	case RK3066B:
 		return pull ? false : true;
+	case RK1108:
 	case RK3188:
 	case RK3288:
 	case RK3368:
@@ -1385,7 +1389,6 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
 	for (i = 0; i < num_configs; i++) {
 		param = pinconf_to_config_param(configs[i]);
 		arg = pinconf_to_config_argument(configs[i]);
-
 		switch (param) {
 		case PIN_CONFIG_BIAS_DISABLE:
 			rc =  rockchip_set_pull(bank, pin - bank->pin_base,
@@ -2455,6 +2458,26 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev)
 	return 0;
 }
 
+static struct rockchip_pin_bank rk1108_pin_banks[] = {
+	PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU,
+					     IOMUX_SOURCE_PMU),
+	PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
+	PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, 0, 0, 0),
+	PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", 0, 0, 0, 0),
+};
+
+static struct rockchip_pin_ctrl rk1108_pin_ctrl = {
+	.pin_banks		= rk1108_pin_banks,
+	.nr_banks		= ARRAY_SIZE(rk1108_pin_banks),
+	.label			= "RK1108-GPIO",
+	.type			= RK1108,
+	.grf_mux_offset		= 0x10,
+	.pmu_mux_offset		= 0x0,
+	.pull_calc_reg          = rk3288_calc_pull_reg_and_bit,
+};
+
 static struct rockchip_pin_bank rk2928_pin_banks[] = {
 	PIN_BANK(0, 32, "gpio0"),
 	PIN_BANK(1, 32, "gpio1"),
@@ -2684,6 +2707,8 @@ static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
 };
 
 static const struct of_device_id rockchip_pinctrl_dt_match[] = {
+	{ .compatible = "rockchip,rk1108-pinctrl",
+		.data = (void *)&rk1108_pin_ctrl },
 	{ .compatible = "rockchip,rk2928-pinctrl",
 		.data = (void *)&rk2928_pin_ctrl },
 	{ .compatible = "rockchip,rk3036-pinctrl",
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/6] pinctrl: rockchip: add support for rk1108
  2016-11-03 12:34 ` [PATCH 2/6] pinctrl: rockchip: add support for rk1108 Andy Yan
@ 2016-11-03 15:55   ` Heiko Stübner
  2016-11-06 10:05   ` Linus Walleij
  2016-11-12 17:41   ` 陈豪
  2 siblings, 0 replies; 8+ messages in thread
From: Heiko Stübner @ 2016-11-03 15:55 UTC (permalink / raw)
  To: Andy Yan
  Cc: david.wu, linux-gpio, linux-rockchip, linus.walleij,
	linux-arm-kernel, linux-kernel

Am Donnerstag, 3. November 2016, 20:34:30 schrieb Andy Yan:
> Add basic support for rk1108 soc
> 
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

nice when support for a new soc is that easy in a driver :-)

There are two small issues below and with those fixed
Reviewed-by: Heiko Stuebner <heiko@sntech.de>

> ---
> 
>  drivers/pinctrl/pinctrl-rockchip.c | 27 ++++++++++++++++++++++++++-
>  1 file changed, 26 insertions(+), 1 deletion(-)

missing devicetree binding update for the new compatible

> diff --git a/drivers/pinctrl/pinctrl-rockchip.c
> b/drivers/pinctrl/pinctrl-rockchip.c index 49bf7dc..9f324b1 100644
> --- a/drivers/pinctrl/pinctrl-rockchip.c
> +++ b/drivers/pinctrl/pinctrl-rockchip.c

[...]

> +static struct rockchip_pin_ctrl rk1108_pin_ctrl = {
> +	.pin_banks		= rk1108_pin_banks,
> +	.nr_banks		= ARRAY_SIZE(rk1108_pin_banks),
> +	.label			= "RK1108-GPIO",
> +	.type			= RK1108,
> +	.grf_mux_offset		= 0x10,
> +	.pmu_mux_offset		= 0x0,
> +	.pull_calc_reg          = rk3288_calc_pull_reg_and_bit,

this last line has spaces instead of tabs between .pull_calc_reg and the "="


Heiko

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/6] pinctrl: rockchip: add support for rk1108
  2016-11-03 12:34 ` [PATCH 2/6] pinctrl: rockchip: add support for rk1108 Andy Yan
  2016-11-03 15:55   ` Heiko Stübner
@ 2016-11-06 10:05   ` Linus Walleij
  2016-11-12 17:41   ` 陈豪
  2 siblings, 0 replies; 8+ messages in thread
From: Linus Walleij @ 2016-11-06 10:05 UTC (permalink / raw)
  To: Andy Yan
  Cc: Heiko Stübner, David Wu, linux-gpio@vger.kernel.org,
	open list:ARM/Rockchip SoC...,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org

On Thu, Nov 3, 2016 at 1:34 PM, Andy Yan <andy.yan@rock-chips.com> wrote:

> Add basic support for rk1108 soc
>
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

I only see this patch from the series, I guess this is the only
patch affecting pin control so thanks for not spamming :)

Please resend with Heiko's requested fixes and his Reviewed-by
tag and I will apply it.

Yours,
Linus Walleij

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 0/6] Add basic support for support for Rockchip RK1108 SOC
       [not found] ` <1478175975-11779-1-git-send-email-andy.yan-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
@ 2016-11-12 16:02   ` 陈豪
  0 siblings, 0 replies; 8+ messages in thread
From: 陈豪 @ 2016-11-12 16:02 UTC (permalink / raw)
  To: Andy Yan
  Cc: Heiko Stuebner, Linus Walleij, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
	Shawn Lin, linux-clk-u79uwXL29TY76Z2rM5mHXA,
	briannorris-F7+t8E8rja9g9hUCZPvPmw,
	linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	devicetree-u79uwXL29TY76Z2rM5mHXA,
	mturquette-rdvid1DuHRBWk0Htik3J/w, sboyd-sgV2jX0FEOL9JmXXK+q4OQ,
	linux-gpio-u79uwXL29TY76Z2rM5mHXA, linux-I+IVW8TIWO2tmTQ+vhA3Yw,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
	ulf.hansson-QSEj5FYQhm4dnm+yROfE0A,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA, mark.rutland-5wv7dgnIgG8,
	elaine.zhang-TNX95d0MmH7DzftRWevZcw

patches 1-5 on rk1108-cvr-v10 board.
Tested-by: Jacob Chen <jacob2.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org>

2016-11-03 20:26 GMT+08:00 Andy Yan <andy.yan-TNX95d0MmH7DzftRWevZcw@public.gmane.org>:
>
> RK1108 is embedded with an ARM Cortex-A7 single core and a DSP core.
> It is designed for varies application scenario such as car DVR, sports
> DV, secure camera and UAV camera.
> This patch series add basic support for it, which can boot a board with
> initramfs into shell.
> More new feathers will come soon.
>
>
> Andy Yan (4):
>   pinctrl: rockchip: add support for rk1108
>   ARM: dts: add basic support for Rockchip RK1108 SOC
>   ARM: add low level debug uart for rk1108
>   ARM: dts: rockchip: add rockchip RK1108 Evaluation board
>
> Shawn Lin (2):
>   dt-bindings: rockchip-dw-mshc: add RK1108 dw-mshc description
>   clk: rockchip: add clock controller for rk1108
>
>  Documentation/devicetree/bindings/arm/rockchip.txt |   3 +
>  .../devicetree/bindings/mmc/rockchip-dw-mshc.txt   |   1 +
>  arch/arm/Kconfig.debug                             |  30 ++
>  arch/arm/boot/dts/Makefile                         |   1 +
>  arch/arm/boot/dts/rk1108-evb.dts                   |  69 +++
>  arch/arm/boot/dts/rk1108.dtsi                      | 420 +++++++++++++++++++
>  arch/arm/mach-rockchip/rockchip.c                  |   1 +
>  drivers/clk/rockchip/Makefile                      |   1 +
>  drivers/clk/rockchip/clk-rk1108.c                  | 463 +++++++++++++++++++++
>  drivers/clk/rockchip/clk.h                         |  14 +
>  drivers/pinctrl/pinctrl-rockchip.c                 |  27 +-
>  include/dt-bindings/clock/rk1108-cru.h             | 308 ++++++++++++++
>  12 files changed, 1337 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm/boot/dts/rk1108-evb.dts
>  create mode 100644 arch/arm/boot/dts/rk1108.dtsi
>  create mode 100644 drivers/clk/rockchip/clk-rk1108.c
>  create mode 100644 include/dt-bindings/clock/rk1108-cru.h
>
> --
> 2.7.4
>
>
--
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^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/6] pinctrl: rockchip: add support for rk1108
  2016-11-03 12:34 ` [PATCH 2/6] pinctrl: rockchip: add support for rk1108 Andy Yan
  2016-11-03 15:55   ` Heiko Stübner
  2016-11-06 10:05   ` Linus Walleij
@ 2016-11-12 17:41   ` 陈豪
  2016-11-12 21:44     ` Heiko Stübner
  2 siblings, 1 reply; 8+ messages in thread
From: 陈豪 @ 2016-11-12 17:41 UTC (permalink / raw)
  To: Andy Yan
  Cc: Heiko Stuebner, david.wu, linux-gpio, linux-rockchip,
	Linus Walleij, linux-arm-kernel, linux-kernel

2016-11-03 20:34 GMT+08:00 Andy Yan <andy.yan@rock-chips.com>:
> Add basic support for rk1108 soc
>
> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
> ---
>
>  drivers/pinctrl/pinctrl-rockchip.c | 27 ++++++++++++++++++++++++++-
>  1 file changed, 26 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
> index 49bf7dc..9f324b1 100644
> --- a/drivers/pinctrl/pinctrl-rockchip.c
> +++ b/drivers/pinctrl/pinctrl-rockchip.c
> @@ -59,6 +59,7 @@
>  #define GPIO_LS_SYNC           0x60
>
>  enum rockchip_pinctrl_type {
> +       RK1108,
>         RK2928,
>         RK3066B,
>         RK3188,
> @@ -1123,6 +1124,7 @@ static int rockchip_get_pull(struct rockchip_pin_bank *bank, int pin_num)
>                 return !(data & BIT(bit))
>                                 ? PIN_CONFIG_BIAS_PULL_PIN_DEFAULT
>                                 : PIN_CONFIG_BIAS_DISABLE;
> +       case RK1108:
>         case RK3188:
>         case RK3288:
>         case RK3368:
> @@ -1169,6 +1171,7 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
>
>                 spin_unlock_irqrestore(&bank->slock, flags);
>                 break;
> +       case RK1108:
>         case RK3188:
>         case RK3288:
>         case RK3368:
> @@ -1358,6 +1361,7 @@ static bool rockchip_pinconf_pull_valid(struct rockchip_pin_ctrl *ctrl,
>                                         pull == PIN_CONFIG_BIAS_DISABLE);
>         case RK3066B:
>                 return pull ? false : true;
> +       case RK1108:
>         case RK3188:
>         case RK3288:
>         case RK3368:
> @@ -1385,7 +1389,6 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
>         for (i = 0; i < num_configs; i++) {
>                 param = pinconf_to_config_param(configs[i]);
>                 arg = pinconf_to_config_argument(configs[i]);
> -
>                 switch (param) {
>                 case PIN_CONFIG_BIAS_DISABLE:
>                         rc =  rockchip_set_pull(bank, pin - bank->pin_base,
> @@ -2455,6 +2458,26 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev)
>         return 0;
>  }
>
> +static struct rockchip_pin_bank rk1108_pin_banks[] = {
> +       PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU,
> +                                            IOMUX_SOURCE_PMU,
> +                                            IOMUX_SOURCE_PMU,
> +                                            IOMUX_SOURCE_PMU),
> +       PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
> +       PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, 0, 0, 0),
> +       PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", 0, 0, 0, 0),
> +};
> +
> +static struct rockchip_pin_ctrl rk1108_pin_ctrl = {
> +       .pin_banks              = rk1108_pin_banks,
> +       .nr_banks               = ARRAY_SIZE(rk1108_pin_banks),
> +       .label                  = "RK1108-GPIO",
> +       .type                   = RK1108,
> +       .grf_mux_offset         = 0x10,
> +       .pmu_mux_offset         = 0x0,
> +       .pull_calc_reg          = rk3288_calc_pull_reg_and_bit,
> +};
> +
>  static struct rockchip_pin_bank rk2928_pin_banks[] = {
>         PIN_BANK(0, 32, "gpio0"),
>         PIN_BANK(1, 32, "gpio1"),
> @@ -2684,6 +2707,8 @@ static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
>  };
>
>  static const struct of_device_id rockchip_pinctrl_dt_match[] = {
> +       { .compatible = "rockchip,rk1108-pinctrl",
> +               .data = (void *)&rk1108_pin_ctrl },
>         { .compatible = "rockchip,rk2928-pinctrl",
>                 .data = (void *)&rk2928_pin_ctrl },
>         { .compatible = "rockchip,rk3036-pinctrl",
> --
> 2.7.4
>
>

rk3288_calc_pull_reg_and_bit can't be used directly in rk1108.
rk1108 have a different PULL_PMU_OFFSET and PULL_OFFSET.

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/6] pinctrl: rockchip: add support for rk1108
  2016-11-12 17:41   ` 陈豪
@ 2016-11-12 21:44     ` Heiko Stübner
  2016-11-13  7:24       ` Andy Yan
  0 siblings, 1 reply; 8+ messages in thread
From: Heiko Stübner @ 2016-11-12 21:44 UTC (permalink / raw)
  To: 陈豪
  Cc: Andy Yan, david.wu, linux-gpio, linux-rockchip, Linus Walleij,
	linux-arm-kernel, linux-kernel

Hi Jacob,

Am Sonntag, 13. November 2016, 01:41:21 schrieb 陈豪:
> 2016-11-03 20:34 GMT+08:00 Andy Yan <andy.yan@rock-chips.com>:
> > Add basic support for rk1108 soc
> > 
> > Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
> > ---
> > 
> >  drivers/pinctrl/pinctrl-rockchip.c | 27 ++++++++++++++++++++++++++-
> >  1 file changed, 26 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/pinctrl/pinctrl-rockchip.c
> > b/drivers/pinctrl/pinctrl-rockchip.c index 49bf7dc..9f324b1 100644
> > --- a/drivers/pinctrl/pinctrl-rockchip.c
> > +++ b/drivers/pinctrl/pinctrl-rockchip.c
> > @@ -59,6 +59,7 @@
> > 
> >  #define GPIO_LS_SYNC           0x60
> >  
> >  enum rockchip_pinctrl_type {
> > 
> > +       RK1108,
> > 
> >         RK2928,
> >         RK3066B,
> >         RK3188,
> > 
> > @@ -1123,6 +1124,7 @@ static int rockchip_get_pull(struct
> > rockchip_pin_bank *bank, int pin_num)> 
> >                 return !(data & BIT(bit))
> >                 
> >                                 ? PIN_CONFIG_BIAS_PULL_PIN_DEFAULT
> >                                 
> >                                 : PIN_CONFIG_BIAS_DISABLE;
> > 
> > +       case RK1108:
> >         case RK3188:
> >         case RK3288:
> > 
> >         case RK3368:
> > @@ -1169,6 +1171,7 @@ static int rockchip_set_pull(struct
> > rockchip_pin_bank *bank,> 
> >                 spin_unlock_irqrestore(&bank->slock, flags);
> >                 break;
> > 
> > +       case RK1108:
> >         case RK3188:
> >         case RK3288:
> > 
> >         case RK3368:
> > @@ -1358,6 +1361,7 @@ static bool rockchip_pinconf_pull_valid(struct
> > rockchip_pin_ctrl *ctrl,> 
> >                                         pull == PIN_CONFIG_BIAS_DISABLE);
> >         
> >         case RK3066B:
> >                 return pull ? false : true;
> > 
> > +       case RK1108:
> >         case RK3188:
> >         case RK3288:
> > 
> >         case RK3368:
> > @@ -1385,7 +1389,6 @@ static int rockchip_pinconf_set(struct pinctrl_dev
> > *pctldev, unsigned int pin,> 
> >         for (i = 0; i < num_configs; i++) {
> >         
> >                 param = pinconf_to_config_param(configs[i]);
> >                 arg = pinconf_to_config_argument(configs[i]);
> > 
> > -
> > 
> >                 switch (param) {
> >                 
> >                 case PIN_CONFIG_BIAS_DISABLE:
> >                         rc =  rockchip_set_pull(bank, pin -
> >                         bank->pin_base,
> > 
> > @@ -2455,6 +2458,26 @@ static int rockchip_pinctrl_probe(struct
> > platform_device *pdev)> 
> >         return 0;
> >  
> >  }
> > 
> > +static struct rockchip_pin_bank rk1108_pin_banks[] = {
> > +       PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU,
> > +                                            IOMUX_SOURCE_PMU,
> > +                                            IOMUX_SOURCE_PMU,
> > +                                            IOMUX_SOURCE_PMU),
> > +       PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
> > +       PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, 0, 0, 0),
> > +       PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", 0, 0, 0, 0),
> > +};
> > +
> > +static struct rockchip_pin_ctrl rk1108_pin_ctrl = {
> > +       .pin_banks              = rk1108_pin_banks,
> > +       .nr_banks               = ARRAY_SIZE(rk1108_pin_banks),
> > +       .label                  = "RK1108-GPIO",
> > +       .type                   = RK1108,
> > +       .grf_mux_offset         = 0x10,
> > +       .pmu_mux_offset         = 0x0,
> > +       .pull_calc_reg          = rk3288_calc_pull_reg_and_bit,
> > +};
> > +
> > 
> >  static struct rockchip_pin_bank rk2928_pin_banks[] = {
> >  
> >         PIN_BANK(0, 32, "gpio0"),
> >         PIN_BANK(1, 32, "gpio1"),
> > 
> > @@ -2684,6 +2707,8 @@ static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
> > 
> >  };
> >  
> >  static const struct of_device_id rockchip_pinctrl_dt_match[] = {
> > 
> > +       { .compatible = "rockchip,rk1108-pinctrl",
> > +               .data = (void *)&rk1108_pin_ctrl },
> > 
> >         { .compatible = "rockchip,rk2928-pinctrl",
> >         
> >                 .data = (void *)&rk2928_pin_ctrl },
> >         
> >         { .compatible = "rockchip,rk3036-pinctrl",
> > 
> > --
> > 2.7.4
> 
> rk3288_calc_pull_reg_and_bit can't be used directly in rk1108.
> rk1108 have a different PULL_PMU_OFFSET and PULL_OFFSET.

yes, you're right, the offsets are different, so need a new function.

Andy, when at it, you might also want to include drive-strength functionality? 
It is missing here but from looking at the TRM, it should be pretty easy to 
add, as everything looks similar to what other rockchip socs do.


Heiko

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH 2/6] pinctrl: rockchip: add support for rk1108
  2016-11-12 21:44     ` Heiko Stübner
@ 2016-11-13  7:24       ` Andy Yan
  0 siblings, 0 replies; 8+ messages in thread
From: Andy Yan @ 2016-11-13  7:24 UTC (permalink / raw)
  To: Heiko Stübner, 陈豪
  Cc: david.wu, linux-gpio, linux-rockchip, Linus Walleij,
	linux-arm-kernel, linux-kernel

Hi Heiko, Jacob:


On 2016年11月13日 05:44, Heiko Stübner wrote:
> Hi Jacob,
>
> Am Sonntag, 13. November 2016, 01:41:21 schrieb 陈豪:
>> 2016-11-03 20:34 GMT+08:00 Andy Yan <andy.yan@rock-chips.com>:
>>> Add basic support for rk1108 soc
>>>
>>> Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
>>> ---
>>>
>>>   drivers/pinctrl/pinctrl-rockchip.c | 27 ++++++++++++++++++++++++++-
>>>   1 file changed, 26 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/pinctrl/pinctrl-rockchip.c
>>> b/drivers/pinctrl/pinctrl-rockchip.c index 49bf7dc..9f324b1 100644
>>> --- a/drivers/pinctrl/pinctrl-rockchip.c
>>> +++ b/drivers/pinctrl/pinctrl-rockchip.c
>>> @@ -59,6 +59,7 @@
>>>
>>>   #define GPIO_LS_SYNC           0x60
>>>   
>>>   enum rockchip_pinctrl_type {
>>>
>>> +       RK1108,
>>>
>>>          RK2928,
>>>          RK3066B,
>>>          RK3188,
>>>
>>> @@ -1123,6 +1124,7 @@ static int rockchip_get_pull(struct
>>> rockchip_pin_bank *bank, int pin_num)>
>>>                  return !(data & BIT(bit))
>>>                  
>>>                                  ? PIN_CONFIG_BIAS_PULL_PIN_DEFAULT
>>>                                  
>>>                                  : PIN_CONFIG_BIAS_DISABLE;
>>>
>>> +       case RK1108:
>>>          case RK3188:
>>>          case RK3288:
>>>
>>>          case RK3368:
>>> @@ -1169,6 +1171,7 @@ static int rockchip_set_pull(struct
>>> rockchip_pin_bank *bank,>
>>>                  spin_unlock_irqrestore(&bank->slock, flags);
>>>                  break;
>>>
>>> +       case RK1108:
>>>          case RK3188:
>>>          case RK3288:
>>>
>>>          case RK3368:
>>> @@ -1358,6 +1361,7 @@ static bool rockchip_pinconf_pull_valid(struct
>>> rockchip_pin_ctrl *ctrl,>
>>>                                          pull == PIN_CONFIG_BIAS_DISABLE);
>>>          
>>>          case RK3066B:
>>>                  return pull ? false : true;
>>>
>>> +       case RK1108:
>>>          case RK3188:
>>>          case RK3288:
>>>
>>>          case RK3368:
>>> @@ -1385,7 +1389,6 @@ static int rockchip_pinconf_set(struct pinctrl_dev
>>> *pctldev, unsigned int pin,>
>>>          for (i = 0; i < num_configs; i++) {
>>>          
>>>                  param = pinconf_to_config_param(configs[i]);
>>>                  arg = pinconf_to_config_argument(configs[i]);
>>>
>>> -
>>>
>>>                  switch (param) {
>>>                  
>>>                  case PIN_CONFIG_BIAS_DISABLE:
>>>                          rc =  rockchip_set_pull(bank, pin -
>>>                          bank->pin_base,
>>>
>>> @@ -2455,6 +2458,26 @@ static int rockchip_pinctrl_probe(struct
>>> platform_device *pdev)>
>>>          return 0;
>>>   
>>>   }
>>>
>>> +static struct rockchip_pin_bank rk1108_pin_banks[] = {
>>> +       PIN_BANK_IOMUX_FLAGS(0, 32, "gpio0", IOMUX_SOURCE_PMU,
>>> +                                            IOMUX_SOURCE_PMU,
>>> +                                            IOMUX_SOURCE_PMU,
>>> +                                            IOMUX_SOURCE_PMU),
>>> +       PIN_BANK_IOMUX_FLAGS(1, 32, "gpio1", 0, 0, 0, 0),
>>> +       PIN_BANK_IOMUX_FLAGS(2, 32, "gpio2", 0, 0, 0, 0),
>>> +       PIN_BANK_IOMUX_FLAGS(3, 32, "gpio3", 0, 0, 0, 0),
>>> +};
>>> +
>>> +static struct rockchip_pin_ctrl rk1108_pin_ctrl = {
>>> +       .pin_banks              = rk1108_pin_banks,
>>> +       .nr_banks               = ARRAY_SIZE(rk1108_pin_banks),
>>> +       .label                  = "RK1108-GPIO",
>>> +       .type                   = RK1108,
>>> +       .grf_mux_offset         = 0x10,
>>> +       .pmu_mux_offset         = 0x0,
>>> +       .pull_calc_reg          = rk3288_calc_pull_reg_and_bit,
>>> +};
>>> +com
>>>
>>>   static struct rockchip_pin_bank rk2928_pin_banks[] = {
>>>   
>>>          PIN_BANK(0, 32, "gpio0"),
>>>          PIN_BANK(1, 32, "gpio1"),
>>>
>>> @@ -2684,6 +2707,8 @@ static struct rockchip_pin_ctrl rk3399_pin_ctrl = {
>>>
>>>   };
>>>   
>>>   static const struct of_device_id rockchip_pinctrl_dt_match[] = {
>>>
>>> +       { .compatible = "rockchip,rk1108-pinctrl",
>>> +               .data = (void *)&rk1108_pin_ctrl },
>>>
>>>          { .compatible = "rockchip,rk2928-pinctrl",
>>>          
>>>                  .data = (void *)&rk2928_pin_ctrl },
>>>          
>>>          { .compatible = "rockchip,rk3036-pinctrl",
>>>
>>> --
>>> 2.7.4
>> rk3288_calc_pull_reg_and_bit can't be used directly in rk1108.
>> rk1108 have a different PULL_PMU_OFFSET and PULL_OFFSET.
> yes, you're right, the offsets are different, so need a new function.
>
> Andy, when at it, you might also want to include drive-strength functionality?
> It is missing here but from looking at the TRM, it should be pretty easy to
> add, as everything looks similar to what other rockchip socs do.

     I had already found it, it will be fixed in next version.

     Thank you!
>
> Heiko
>
>
>



^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2016-11-13  7:24 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-11-03 12:26 [PATCH 0/6] Add basic support for support for Rockchip RK1108 SOC Andy Yan
2016-11-03 12:34 ` [PATCH 2/6] pinctrl: rockchip: add support for rk1108 Andy Yan
2016-11-03 15:55   ` Heiko Stübner
2016-11-06 10:05   ` Linus Walleij
2016-11-12 17:41   ` 陈豪
2016-11-12 21:44     ` Heiko Stübner
2016-11-13  7:24       ` Andy Yan
     [not found] ` <1478175975-11779-1-git-send-email-andy.yan-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2016-11-12 16:02   ` [PATCH 0/6] Add basic support for support for Rockchip RK1108 SOC 陈豪

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