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From: Niyas Sait <niyas.sait@linaro.org>
To: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: linux-gpio@vger.kernel.org, mika.westerberg@linux.intel.com,
	rafael@kernel.org, linus.walleij@linaro.org
Subject: Re: [PATCH RFC v2 0/3] pinctrl: add ACPI support to pin controller
Date: Tue, 15 Nov 2022 19:15:25 +0000	[thread overview]
Message-ID: <35760f9d-e491-4014-96f3-b13657c1c523@linaro.org> (raw)
In-Reply-To: <Y3Pexz7tLrAP05uY@smile.fi.intel.com>

 >>> 1) why do you need specific _DSD() for the pin mappings?
 >>
 >> _DSD is required to pass the GPIO number to Pin mapping. Is there a 
better
 >> way to do it ?
 >
 > Don't you have your pins sequential? Doesn't driver know the pin list?
 > Where are the device tree bindings for those properties? Are they already
 > present there?

They are not sequential. There are multiple GPIO controllers and GPIO 
pins are mapped to different pin ranges.

Please checkout arch/arm64/boot/dts/freescale/imx8mp.dtsi for device 
tree binding.

Yes I think it can be done in the driver.

 >>> 2) wgy you need vendor data for some of Pin*() resources?
 >>
 >> Vendor data contains platform specific mux, config and input selection
 >> register for the pin group.
 >
 > Why can't this be in the driver?
 >

Yes I think it can be done in driver. But I think we still have to pass 
the vendor data from the ACPI resources to the drivers in case if any 
implementation wants to pass vendor specific data for the driver.

--
Niyas

On 15/11/2022 18:47, Andy Shevchenko wrote:
> On Tue, Nov 15, 2022 at 06:29:28PM +0000, Niyas Sait wrote:
>>> Cover letter doesn't point to the ASL code you are using.
>>
>> I've built this patch with a prototype ACPI implementation for NXP I.MX8MP
>> platform.
>>
>> You can see the code here: https://gitlab.com/nsait-linaro/acpi-patches/-/blob/master/0001-add-acpi-pinctrl-support-for-i2c-controllers.patch.
> 
> Yes, my point that you have to create a cover letter
> 
>>> 1) why do you need specific _DSD() for the pin mappings?
>>
>> _DSD is required to pass the GPIO number to Pin mapping. Is there a better
>> way to do it ?
> 
> Don't you have your pins sequential? Doesn't driver know the pin list?
> Where are the device tree bindings for those properties? Are they already
> present there?
> 
>>> 2) wgy you need vendor data for some of Pin*() resources?
>>
>> Vendor data contains platform specific mux, config and input selection
>> register for the pin group.
> 
> Why can't this be in the driver?
> 
> ...
> 
> On top of that, how other hardware can utilize what you are doing without
> adding redundancy to the ACPI?
> 

  reply	other threads:[~2022-11-15 19:15 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-15 17:54 [PATCH RFC v2 0/3] pinctrl: add ACPI support to pin controller Niyas Sait
2022-11-15 17:54 ` [PATCH RFC v2 1/3] pinctrl: add support for ACPI PinGroup resource Niyas Sait
2022-11-16  9:41   ` Mika Westerberg
2022-11-17 13:28     ` Niyas Sait
2022-11-17 15:08       ` Mika Westerberg
2022-11-15 17:54 ` [PATCH RFC v2 2/3] pinconf-generic: clarify pull up and pull down config values Niyas Sait
2022-11-17  9:30   ` Linus Walleij
2022-11-17 10:37     ` Andy Shevchenko
2022-11-17 10:39       ` Andy Shevchenko
2022-11-17 11:53         ` Niyas Sait
2022-11-17 12:36           ` Andy Shevchenko
2022-11-15 17:54 ` [PATCH RFC v2 3/3] pinctrl: add support for ACPI pin function and config resources Niyas Sait
2022-11-16  9:57   ` Mika Westerberg
2022-11-15 18:12 ` [PATCH RFC v2 0/3] pinctrl: add ACPI support to pin controller Andy Shevchenko
2022-11-15 18:29   ` Niyas Sait
2022-11-15 18:47     ` Andy Shevchenko
2022-11-15 19:15       ` Niyas Sait [this message]
2022-11-16 10:16         ` Andy Shevchenko
2022-11-16 10:27           ` Niyas Sait
2022-11-16  9:50       ` Niyas Sait
2022-11-16  9:56         ` Andy Shevchenko
2022-11-16 10:40           ` Niyas Sait
2022-11-16 13:27             ` Andy Shevchenko
2022-11-16 13:38               ` Andy Shevchenko
2022-11-16 10:17 ` Andy Shevchenko

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