linux-gpio.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: "Linus Walleij" <linus.walleij@linaro.org>,
	"Niklas Söderlund" <niklas.soderlund+renesas@ragnatech.se>,
	linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org
Subject: Re: [PATCH] pinctrl: sh-pfc: r8a7796: Add group for AVB MDIO and MII pins
Date: Thu, 20 Apr 2017 13:02:16 +0300	[thread overview]
Message-ID: <3839999.H9bRVaxdVd@avalon> (raw)
In-Reply-To: <1492681746-20005-1-git-send-email-geert+renesas@glider.be>

Hi Geert,

Thank you for the patch.

On Thursday 20 Apr 2017 11:49:06 Geert Uytterhoeven wrote:
> Group the AVB pins into similar groups as found in other sh-pfc drivers.
> The pins can not be muxed between functions other than AVB, but their
> drive strengths can be controlled.
> 
> The group avb_mdc containing ADV_MDC and ADV_MDIO is called avb_mdio on
> other SoCs.  In pfc-r8a7796 the avb_mdc group already existed and is in
> use in DT. Therefore add the ADV_MDIO pin to the existing group instead
> of renaming it.

This clearly shows that we need a few kernel releases to test PFC-related code 
and DT before we can commit to an ABI. How do you think we should handle this 
?

> Based on commit b25719eb938eb39a ("pinctrl: sh-pfc: r8a7795: Add group
> for AVB MDIO and MII pins").
> 
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> ---
> To be queued up in sh-pfc-for-v4.13.
> 
>  drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 30 +++++++++++++++++++++++++++---
>  1 file changed, 27 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
> b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c index
> b0362ae707e2e59a..b9c3d9d7ca75023f 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
> @@ -1605,11 +1605,33 @@ static const unsigned int avb_phy_int_mux[] = {
>  	AVB_PHY_INT_MARK,
>  };
>  static const unsigned int avb_mdc_pins[] = {
> -	/* AVB_MDC */
> -	RCAR_GP_PIN(2, 9),
> +	/* AVB_MDC, AVB_MDIO */
> +	RCAR_GP_PIN(2, 9), PIN_NUMBER('A', 9),
>  };
>  static const unsigned int avb_mdc_mux[] = {
> -	AVB_MDC_MARK,
> +	AVB_MDC_MARK, AVB_MDIO_MARK,
> +};
> +static const unsigned int avb_mii_pins[] = {
> +	/*
> +	 * AVB_TX_CTL, AVB_TXC, AVB_TD0,
> +	 * AVB_TD1, AVB_TD2, AVB_TD3,
> +	 * AVB_RX_CTL, AVB_RXC, AVB_RD0,
> +	 * AVB_RD1, AVB_RD2, AVB_RD3,
> +	 * AVB_TXCREFCLK
> +	 */
> +	PIN_NUMBER('A', 8), PIN_NUMBER('A', 19), PIN_NUMBER('A', 18),
> +	PIN_NUMBER('B', 18), PIN_NUMBER('A', 17), PIN_NUMBER('B', 17),
> +	PIN_NUMBER('A', 16), PIN_NUMBER('B', 19), PIN_NUMBER('A', 13),
> +	PIN_NUMBER('B', 13), PIN_NUMBER('A', 14), PIN_NUMBER('B', 14),
> +	PIN_NUMBER('A', 12),
> +
> +};
> +static const unsigned int avb_mii_mux[] = {
> +	AVB_TX_CTL_MARK, AVB_TXC_MARK, AVB_TD0_MARK,
> +	AVB_TD1_MARK, AVB_TD2_MARK, AVB_TD3_MARK,
> +	AVB_RX_CTL_MARK, AVB_RXC_MARK, AVB_RD0_MARK,
> +	AVB_RD1_MARK, AVB_RD2_MARK, AVB_RD3_MARK,
> +	AVB_TXCREFCLK_MARK,
>  };
>  static const unsigned int avb_avtp_pps_pins[] = {
>  	/* AVB_AVTP_PPS */
> @@ -3381,6 +3403,7 @@ static const struct sh_pfc_pin_group pinmux_groups[] =
> { SH_PFC_PIN_GROUP(avb_magic),
>  	SH_PFC_PIN_GROUP(avb_phy_int),
>  	SH_PFC_PIN_GROUP(avb_mdc),
> +	SH_PFC_PIN_GROUP(avb_mii),
>  	SH_PFC_PIN_GROUP(avb_avtp_pps),
>  	SH_PFC_PIN_GROUP(avb_avtp_match_a),
>  	SH_PFC_PIN_GROUP(avb_avtp_capture_a),
> @@ -3627,6 +3650,7 @@ static const char * const avb_groups[] = {
>  	"avb_magic",
>  	"avb_phy_int",
>  	"avb_mdc",
> +	"avb_mii",
>  	"avb_avtp_pps",
>  	"avb_avtp_match_a",
>  	"avb_avtp_capture_a",

-- 
Regards,

Laurent Pinchart

  reply	other threads:[~2017-04-20 10:02 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-20  9:49 [PATCH] pinctrl: sh-pfc: r8a7796: Add group for AVB MDIO and MII pins Geert Uytterhoeven
2017-04-20 10:02 ` Laurent Pinchart [this message]
2017-04-20 10:11   ` Geert Uytterhoeven
2017-04-20 10:18     ` Laurent Pinchart
2017-04-20 11:40       ` Geert Uytterhoeven
2017-04-20 11:44         ` Laurent Pinchart
2017-04-20 11:47           ` Geert Uytterhoeven
2017-05-02 14:33             ` Niklas Söderlund
2017-05-11  8:49               ` Geert Uytterhoeven

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=3839999.H9bRVaxdVd@avalon \
    --to=laurent.pinchart@ideasonboard.com \
    --cc=geert+renesas@glider.be \
    --cc=linus.walleij@linaro.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-renesas-soc@vger.kernel.org \
    --cc=niklas.soderlund+renesas@ragnatech.se \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).