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From: Benjamin Larsson <benjamin.larsson@genexis.eu>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk@kernel.org>,
	Lorenzo Bianconi <lorenzo@kernel.org>,
	linux-gpio@vger.kernel.org, linus.walleij@linaro.org,
	sean.wang@kernel.org, linux-mediatek@lists.infradead.org,
	lorenzo.bianconi83@gmail.com, krzk+dt@kernel.org,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	upstream@airoha.com, angelogioacchino.delregno@collabora.com,
	conor+dt@kernel.org, ansuelsmth@gmail.com
Subject: Re: [PATCH 1/2] dt-bindings: pinctrl: airoha: Add EN7581 pinctrl controller
Date: Sun, 18 Aug 2024 14:48:05 +0200	[thread overview]
Message-ID: <3a52e550-1bb1-40fc-b7dd-b454d7c97f97@genexis.eu> (raw)
In-Reply-To: <6da7acc8-f77e-453c-b2fa-4eb9161f637c@lunn.ch>

On 17/08/2024 23:39, Andrew Lunn wrote:
> How messy are the GPIO and PWM registers? Are there N blocks of
> independent GPIO registers? and M blocks of independent PWM registers?
> By that, does one block of GPIO registers contain all you need for one
> GPIO controller? One block of PWM registers give you all you need for
> one PWM controller? Or are the registers for one GPIO controller
> scattered all over the place?
>
> Could you point at a public datasheet?
>
>        Andrew
>
Hi, per my understanding there is no public datasheet/register reference 
manual.

But here is the division of regions of the registers in the gpio block 
and how it is currently divided between the drivers (according to my 
current understanding).

1FBF0200, gpio/pinctrl
1FBF0204, gpio/pinctrl
1FBF0208, gpio/pinctrl
1FBF020C, gpio/pinctrl
1FBF0210, gpio/pinctrl
1FBF0214, gpio/pinctrl
1FBF0218, unclaimed
1FBF021C, pwm
1FBF0220, gpio/pinctrl
1FBF0224, pwm
1FBF0228, pwm
1FBF022C, pwm
1FBF0230, pwm
1FBF0234, pwm
1FBF0238, unclaimed
1FBF023C, pwm
1FBF0240, pwm
1FBF0244, pwm
1FBF0248, pwm
1FBF024C, pwm
1FBF0250, pwm
1FBF0254, pwm
1FBF0258, pwm
1FBF025C, pwm
1FBF0260, gpio/pinctrl
1FBF0264, gpio/pinctrl
1FBF0268, gpio/pinctrl
1FBF0270, gpio/pinctrl
1FBF0278, gpio/pinctrl
1FBF027C, gpio/pinctrl
1FBF0280, gpio/pinctrl
1FBF0284, gpio/pinctrl
1FBF0288, gpio/pinctrl
1FBF028C, gpio/pinctrl
1FBF0290, gpio/pinctrl
1FBF0294, gpio/pinctrl
1FBF0298, pwm
1FBF029C, pwm
1FBF02A0, unclaimed
1FBF02A4, unclaimed
1FBF02A8, unclaimed
1FBF02AC, unclaimed
1FBF02B0, unclaimed
1FBF02B4, unclaimed
1FBF02B8, unclaimed
1FBF02BC, pwm (but currently unclaimed)

The gpio functions are split in 2x32bit register banks. The pin-io and 
interrupt support for these are split amongst the regions.

MvH

Benjamin Larsson


  reply	other threads:[~2024-08-18 12:48 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-11 16:12 [PATCH 0/2] Add pinctrl support to EN7581 SoC Lorenzo Bianconi
2024-08-11 16:12 ` [PATCH 1/2] dt-bindings: pinctrl: airoha: Add EN7581 pinctrl controller Lorenzo Bianconi
2024-08-12  6:48   ` Krzysztof Kozlowski
2024-08-13  8:06     ` Benjamin Larsson
2024-08-16 22:52       ` Rob Herring
2024-08-17 20:46         ` Benjamin Larsson
2024-08-17 21:39           ` Andrew Lunn
2024-08-18 12:48             ` Benjamin Larsson [this message]
2024-08-18 16:02               ` Andrew Lunn
2024-08-18 15:42                 ` Christian Marangi
2024-08-18 16:15                 ` Lorenzo Bianconi
2024-08-18 16:59                 ` Benjamin Larsson
2024-08-18 17:35                   ` Andrew Lunn
2024-08-18 14:22         ` Lorenzo Bianconi
2024-08-18 14:20     ` Lorenzo Bianconi
2024-08-11 16:12 ` [PATCH 2/2] pinctrl: airoha: Add support for EN7581 SoC Lorenzo Bianconi
2024-08-11 21:08   ` kernel test robot
2024-08-11 21:49   ` kernel test robot
2024-08-11 21:59   ` kernel test robot

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