From: <Claudiu.Beznea@microchip.com>
To: <Ludovic.Desroches@microchip.com>, <Codrin.Ciubotariu@microchip.com>
Cc: <linux-arm-kernel@lists.infradead.org>,
<linux-gpio@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linus.walleij@linaro.org>,
<Nicolas.Ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
<robh+dt@kernel.org>
Subject: Re: [PATCH v2] pinctrl: at91: Enable slewrate by default on SAM9X60
Date: Fri, 1 Nov 2019 22:26:07 +0000 [thread overview]
Message-ID: <4255d320-e6c2-8865-7167-ddf9e1951250@microchip.com> (raw)
In-Reply-To: <20191101142602.voj2jeexvvgwgr23@M43218.corp.atmel.com>
On 01.11.2019 16:26, Ludovic Desroches - M43218 wrote:
> On Fri, Nov 01, 2019 at 11:20:31AM +0200, Codrin Ciubotariu wrote:
>> On SAM9X60, slewrate should be enabled on pins with a switching frequency
>> below 50Mhz. Since most of our pins do not exceed this value, we enable
>> slewrate by default. Pins with a switching value that exceeds 50Mhz will
>> have to explicitly disable slewrate.
>>
>> This patch changes the ABI. However, the slewrate macros are only used
>> by SAM9X60 and, at this moment, there are no device-tree files available
>> for this platform.
>>
>> Suggested-by: Ludovic Desroches <ludovic.desroches@microchip.com>
>> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
>
> Thanks
>
>> ---
>>
>> Changes in v2:
>> - updated commit message to reflect the ABI change
>>
>> drivers/pinctrl/pinctrl-at91.c | 4 ++--
>> include/dt-bindings/pinctrl/at91.h | 4 ++--
>> 2 files changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
>> index 117075b5798f..c135149e84e9 100644
>> --- a/drivers/pinctrl/pinctrl-at91.c
>> +++ b/drivers/pinctrl/pinctrl-at91.c
>> @@ -85,8 +85,8 @@ enum drive_strength_bit {
>> DRIVE_STRENGTH_SHIFT)
>>
>> enum slewrate_bit {
>> - SLEWRATE_BIT_DIS,
>> SLEWRATE_BIT_ENA,
>> + SLEWRATE_BIT_DIS,
>> };
>>
>> #define SLEWRATE_BIT_MSK(name) (SLEWRATE_BIT_##name << SLEWRATE_SHIFT)
>> @@ -669,7 +669,7 @@ static void at91_mux_sam9x60_set_slewrate(void __iomem *pio, unsigned pin,
>> {
>> unsigned int tmp;
>>
>> - if (setting < SLEWRATE_BIT_DIS || setting > SLEWRATE_BIT_ENA)
>> + if (setting < SLEWRATE_BIT_ENA || setting > SLEWRATE_BIT_DIS)
>> return;
>>
>> tmp = readl_relaxed(pio + SAM9X60_PIO_SLEWR);
>> diff --git a/include/dt-bindings/pinctrl/at91.h b/include/dt-bindings/pinctrl/at91.h
>> index 3831f91fb3ba..e8e117306b1b 100644
>> --- a/include/dt-bindings/pinctrl/at91.h
>> +++ b/include/dt-bindings/pinctrl/at91.h
>> @@ -27,8 +27,8 @@
>> #define AT91_PINCTRL_DRIVE_STRENGTH_MED (0x2 << 5)
>> #define AT91_PINCTRL_DRIVE_STRENGTH_HI (0x3 << 5)
>>
>> -#define AT91_PINCTRL_SLEWRATE_DIS (0x0 << 9)
>> -#define AT91_PINCTRL_SLEWRATE_ENA (0x1 << 9)
>> +#define AT91_PINCTRL_SLEWRATE_ENA (0x0 << 9)
>> +#define AT91_PINCTRL_SLEWRATE_DIS (0x1 << 9)
>>
>> #define AT91_PIOA 0
>> #define AT91_PIOB 1
>> --
>> 2.20.1
>>
>
next prev parent reply other threads:[~2019-11-01 22:26 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-01 9:20 [PATCH v2] pinctrl: at91: Enable slewrate by default on SAM9X60 Codrin Ciubotariu
2019-11-01 14:26 ` Ludovic.Desroches
2019-11-01 22:26 ` Claudiu.Beznea [this message]
2019-11-03 22:35 ` Linus Walleij
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