From: Heiko Stuebner <heiko@sntech.de>
To: Sebastian Reichel <sebastian.reichel@collabora.com>
Cc: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <brgl@bgdev.pl>,
Adrian Hunter <adrian.hunter@intel.com>,
Ulf Hansson <ulf.hansson@linaro.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-clk@vger.kernel.org, linux-mmc@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, kernel@lists.collabora.co.uk,
Sebastian Reichel <sebastian.reichel@collabora.com>,
kernel@collabora.com
Subject: Re: [PATCHv1 12/19] pinctrl/rockchip: add error handling for pull/drive register getters
Date: Fri, 22 Apr 2022 22:50:47 +0200 [thread overview]
Message-ID: <4833995.GXAFRqVoOG@phil> (raw)
In-Reply-To: <20220422170920.401914-13-sebastian.reichel@collabora.com>
Am Freitag, 22. April 2022, 19:09:13 CEST schrieb Sebastian Reichel:
> Add error handling for the pull and driver register getters in preparation
> for RK3588 support.
>
> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Heiko Stübner <heiko@sntech.de>
> ---
> drivers/pinctrl/pinctrl-rockchip.c | 168 ++++++++++++++++++-----------
> drivers/pinctrl/pinctrl-rockchip.h | 4 +-
> 2 files changed, 109 insertions(+), 63 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
> index a1b598b86aa9..012cd2f0d85b 100644
> --- a/drivers/pinctrl/pinctrl-rockchip.c
> +++ b/drivers/pinctrl/pinctrl-rockchip.c
> @@ -986,9 +986,9 @@ static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
> #define PX30_PULL_PINS_PER_REG 8
> #define PX30_PULL_BANK_STRIDE 16
>
> -static void px30_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int px30_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1008,6 +1008,8 @@ static void px30_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> *reg += ((pin_num / PX30_PULL_PINS_PER_REG) * 4);
> *bit = (pin_num % PX30_PULL_PINS_PER_REG);
> *bit *= PX30_PULL_BITS_PER_PIN;
> +
> + return 0;
> }
>
> #define PX30_DRV_PMU_OFFSET 0x20
> @@ -1016,9 +1018,9 @@ static void px30_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> #define PX30_DRV_PINS_PER_REG 8
> #define PX30_DRV_BANK_STRIDE 16
>
> -static void px30_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int px30_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1038,6 +1040,8 @@ static void px30_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> *reg += ((pin_num / PX30_DRV_PINS_PER_REG) * 4);
> *bit = (pin_num % PX30_DRV_PINS_PER_REG);
> *bit *= PX30_DRV_BITS_PER_PIN;
> +
> + return 0;
> }
>
> #define PX30_SCHMITT_PMU_OFFSET 0x38
> @@ -1077,9 +1081,9 @@ static int px30_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
> #define RV1108_PULL_BITS_PER_PIN 2
> #define RV1108_PULL_BANK_STRIDE 16
>
> -static void rv1108_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rv1108_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1098,6 +1102,8 @@ static void rv1108_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> *reg += ((pin_num / RV1108_PULL_PINS_PER_REG) * 4);
> *bit = (pin_num % RV1108_PULL_PINS_PER_REG);
> *bit *= RV1108_PULL_BITS_PER_PIN;
> +
> + return 0;
> }
>
> #define RV1108_DRV_PMU_OFFSET 0x20
> @@ -1106,9 +1112,9 @@ static void rv1108_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> #define RV1108_DRV_PINS_PER_REG 8
> #define RV1108_DRV_BANK_STRIDE 16
>
> -static void rv1108_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rv1108_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1128,6 +1134,8 @@ static void rv1108_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> *reg += ((pin_num / RV1108_DRV_PINS_PER_REG) * 4);
> *bit = pin_num % RV1108_DRV_PINS_PER_REG;
> *bit *= RV1108_DRV_BITS_PER_PIN;
> +
> + return 0;
> }
>
> #define RV1108_SCHMITT_PMU_OFFSET 0x30
> @@ -1184,9 +1192,9 @@ static int rk3308_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
> #define RK2928_PULL_PINS_PER_REG 16
> #define RK2928_PULL_BANK_STRIDE 8
>
> -static void rk2928_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rk2928_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1196,13 +1204,15 @@ static void rk2928_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> *reg += (pin_num / RK2928_PULL_PINS_PER_REG) * 4;
>
> *bit = pin_num % RK2928_PULL_PINS_PER_REG;
> +
> + return 0;
> };
>
> #define RK3128_PULL_OFFSET 0x118
>
> -static void rk3128_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rk3128_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1212,6 +1222,8 @@ static void rk3128_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> *reg += ((pin_num / RK2928_PULL_PINS_PER_REG) * 4);
>
> *bit = pin_num % RK2928_PULL_PINS_PER_REG;
> +
> + return 0;
> }
>
> #define RK3188_PULL_OFFSET 0x164
> @@ -1220,9 +1232,9 @@ static void rk3128_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> #define RK3188_PULL_BANK_STRIDE 16
> #define RK3188_PULL_PMU_OFFSET 0x64
>
> -static void rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1252,12 +1264,14 @@ static void rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> *bit = 7 - (pin_num % RK3188_PULL_PINS_PER_REG);
> *bit *= RK3188_PULL_BITS_PER_PIN;
> }
> +
> + return 0;
> }
>
> #define RK3288_PULL_OFFSET 0x140
> -static void rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1281,6 +1295,8 @@ static void rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> *bit = (pin_num % RK3188_PULL_PINS_PER_REG);
> *bit *= RK3188_PULL_BITS_PER_PIN;
> }
> +
> + return 0;
> }
>
> #define RK3288_DRV_PMU_OFFSET 0x70
> @@ -1289,9 +1305,9 @@ static void rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> #define RK3288_DRV_PINS_PER_REG 8
> #define RK3288_DRV_BANK_STRIDE 16
>
> -static void rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1315,13 +1331,15 @@ static void rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> *bit = (pin_num % RK3288_DRV_PINS_PER_REG);
> *bit *= RK3288_DRV_BITS_PER_PIN;
> }
> +
> + return 0;
> }
>
> #define RK3228_PULL_OFFSET 0x100
>
> -static void rk3228_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rk3228_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1332,13 +1350,15 @@ static void rk3228_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
>
> *bit = (pin_num % RK3188_PULL_PINS_PER_REG);
> *bit *= RK3188_PULL_BITS_PER_PIN;
> +
> + return 0;
> }
>
> #define RK3228_DRV_GRF_OFFSET 0x200
>
> -static void rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1349,13 +1369,15 @@ static void rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
>
> *bit = (pin_num % RK3288_DRV_PINS_PER_REG);
> *bit *= RK3288_DRV_BITS_PER_PIN;
> +
> + return 0;
> }
>
> #define RK3308_PULL_OFFSET 0xa0
>
> -static void rk3308_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rk3308_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1366,13 +1388,15 @@ static void rk3308_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
>
> *bit = (pin_num % RK3188_PULL_PINS_PER_REG);
> *bit *= RK3188_PULL_BITS_PER_PIN;
> +
> + return 0;
> }
>
> #define RK3308_DRV_GRF_OFFSET 0x100
>
> -static void rk3308_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rk3308_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1383,14 +1407,16 @@ static void rk3308_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
>
> *bit = (pin_num % RK3288_DRV_PINS_PER_REG);
> *bit *= RK3288_DRV_BITS_PER_PIN;
> +
> + return 0;
> }
>
> #define RK3368_PULL_GRF_OFFSET 0x100
> #define RK3368_PULL_PMU_OFFSET 0x10
>
> -static void rk3368_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rk3368_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1414,14 +1440,16 @@ static void rk3368_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> *bit = (pin_num % RK3188_PULL_PINS_PER_REG);
> *bit *= RK3188_PULL_BITS_PER_PIN;
> }
> +
> + return 0;
> }
>
> #define RK3368_DRV_PMU_OFFSET 0x20
> #define RK3368_DRV_GRF_OFFSET 0x200
>
> -static void rk3368_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rk3368_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1445,15 +1473,17 @@ static void rk3368_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> *bit = (pin_num % RK3288_DRV_PINS_PER_REG);
> *bit *= RK3288_DRV_BITS_PER_PIN;
> }
> +
> + return 0;
> }
>
> #define RK3399_PULL_GRF_OFFSET 0xe040
> #define RK3399_PULL_PMU_OFFSET 0x40
> #define RK3399_DRV_3BITS_PER_PIN 3
>
> -static void rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1479,11 +1509,13 @@ static void rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> *bit = (pin_num % RK3188_PULL_PINS_PER_REG);
> *bit *= RK3188_PULL_BITS_PER_PIN;
> }
> +
> + return 0;
> }
>
> -static void rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
> int drv_num = (pin_num / 8);
> @@ -1500,6 +1532,8 @@ static void rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> *bit = (pin_num % 8) * 3;
> else
> *bit = (pin_num % 8) * 2;
> +
> + return 0;
> }
>
> #define RK3568_PULL_PMU_OFFSET 0x20
> @@ -1508,9 +1542,9 @@ static void rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> #define RK3568_PULL_PINS_PER_REG 8
> #define RK3568_PULL_BANK_STRIDE 0x10
>
> -static void rk3568_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rk3568_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1531,6 +1565,8 @@ static void rk3568_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> *bit = (pin_num % RK3568_PULL_PINS_PER_REG);
> *bit *= RK3568_PULL_BITS_PER_PIN;
> }
> +
> + return 0;
> }
>
> #define RK3568_DRV_PMU_OFFSET 0x70
> @@ -1539,9 +1575,9 @@ static void rk3568_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
> #define RK3568_DRV_PINS_PER_REG 2
> #define RK3568_DRV_BANK_STRIDE 0x40
>
> -static void rk3568_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> - int pin_num, struct regmap **regmap,
> - int *reg, u8 *bit)
> +static int rk3568_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> + int pin_num, struct regmap **regmap,
> + int *reg, u8 *bit)
> {
> struct rockchip_pinctrl *info = bank->drvdata;
>
> @@ -1562,6 +1598,8 @@ static void rk3568_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
> *bit = (pin_num % RK3568_DRV_PINS_PER_REG);
> *bit *= RK3568_DRV_BITS_PER_PIN;
> }
> +
> + return 0;
> }
>
> static int rockchip_perpin_drv_list[DRV_TYPE_MAX][8] = {
> @@ -1584,7 +1622,9 @@ static int rockchip_get_drive_perpin(struct rockchip_pin_bank *bank,
> u8 bit;
> int drv_type = bank->drv[pin_num / 8].drv_type;
>
> - ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit);
> + ret = ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit);
> + if (ret)
> + return ret;
>
> switch (drv_type) {
> case DRV_TYPE_IO_1V8_3V0_AUTO:
> @@ -1664,7 +1704,9 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
> dev_dbg(dev, "setting drive of GPIO%d-%d to %d\n",
> bank->bank_num, pin_num, strength);
>
> - ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit);
> + ret = ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit);
> + if (ret)
> + return ret;
> if (ctrl->type == RK3568) {
> rmask_bits = RK3568_DRV_BITS_PER_PIN;
> ret = (1 << (strength + 1)) - 1;
> @@ -1777,7 +1819,9 @@ static int rockchip_get_pull(struct rockchip_pin_bank *bank, int pin_num)
> if (ctrl->type == RK3066B)
> return PIN_CONFIG_BIAS_DISABLE;
>
> - ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit);
> + ret = ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit);
> + if (ret)
> + return ret;
>
> ret = regmap_read(regmap, reg, &data);
> if (ret)
> @@ -1824,7 +1868,9 @@ static int rockchip_set_pull(struct rockchip_pin_bank *bank,
> if (ctrl->type == RK3066B)
> return pull ? -EINVAL : 0;
>
> - ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit);
> + ret = ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit);
> + if (ret)
> + return ret;
>
> switch (ctrl->type) {
> case RK2928:
> diff --git a/drivers/pinctrl/pinctrl-rockchip.h b/drivers/pinctrl/pinctrl-rockchip.h
> index 91f10279d084..4992a048acbc 100644
> --- a/drivers/pinctrl/pinctrl-rockchip.h
> +++ b/drivers/pinctrl/pinctrl-rockchip.h
> @@ -230,10 +230,10 @@ struct rockchip_pin_ctrl {
> struct rockchip_mux_route_data *iomux_routes;
> u32 niomux_routes;
>
> - void (*pull_calc_reg)(struct rockchip_pin_bank *bank,
> + int (*pull_calc_reg)(struct rockchip_pin_bank *bank,
> int pin_num, struct regmap **regmap,
> int *reg, u8 *bit);
> - void (*drv_calc_reg)(struct rockchip_pin_bank *bank,
> + int (*drv_calc_reg)(struct rockchip_pin_bank *bank,
> int pin_num, struct regmap **regmap,
> int *reg, u8 *bit);
> int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
>
next prev parent reply other threads:[~2022-04-22 22:04 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-04-22 17:09 [PATCHv1 00/19] Basic RK3588 Support Sebastian Reichel
2022-04-22 17:09 ` [PATCHv1 01/19] dt-binding: clock: Document rockchip,rk3588-cru bindings Sebastian Reichel
2022-04-23 10:01 ` Krzysztof Kozlowski
2022-04-22 17:09 ` [PATCHv1 02/19] clk: rockchip: add register offset of the cores select parent Sebastian Reichel
2022-04-22 17:09 ` [PATCHv1 03/19] clk: rockchip: add pll type for RK3588 Sebastian Reichel
2022-04-27 13:36 ` Nicolas Dufresne
2022-04-30 0:02 ` Heiko Stübner
2022-04-29 1:56 ` kernel test robot
2022-04-22 17:09 ` [PATCHv1 04/19] clk: rockchip: clk-cpu: add mux setting for cpu change frequency Sebastian Reichel
2022-04-22 17:09 ` [PATCHv1 05/19] clk: rockchip: add dt-binding header for rk3588 Sebastian Reichel
2022-05-02 22:15 ` Rob Herring
2022-04-22 17:09 ` [PATCHv1 06/19] clk: rockchip: Add clock controller for the RK3588 Sebastian Reichel
2022-04-29 19:31 ` kernel test robot
2022-04-22 17:09 ` [PATCHv1 07/19] dt-bindings: mmc: sdhci-of-dwcmhsc: Add rk3588 Sebastian Reichel
2022-04-23 10:01 ` Krzysztof Kozlowski
2022-05-04 10:37 ` Ulf Hansson
2022-04-22 17:09 ` [PATCHv1 08/19] mmc: sdhci-of-dwcmshc: add reset call back for rockchip Socs Sebastian Reichel
2022-04-23 10:32 ` Dmitry Osipenko
2022-04-27 7:50 ` Adrian Hunter
2022-04-22 17:09 ` [PATCHv1 09/19] mmc: sdhci-of-dwcmshc: rename rk3568 to rk35xx Sebastian Reichel
2022-04-27 7:51 ` Adrian Hunter
2022-04-22 17:09 ` [PATCHv1 10/19] mmc: sdhci-of-dwcmshc: add support for rk3588 Sebastian Reichel
2022-04-27 7:51 ` Adrian Hunter
2022-04-22 17:09 ` [PATCHv1 11/19] dt-bindings: pinctrl: rockchip: add rk3588 Sebastian Reichel
2022-04-23 10:02 ` Krzysztof Kozlowski
2022-04-22 17:09 ` [PATCHv1 12/19] pinctrl/rockchip: add error handling for pull/drive register getters Sebastian Reichel
2022-04-22 20:50 ` Heiko Stuebner [this message]
2022-04-28 22:54 ` Linus Walleij
2022-04-22 17:09 ` [PATCHv1 13/19] pinctrl/rockchip: add rk3588 support Sebastian Reichel
2022-04-28 22:55 ` Linus Walleij
2022-04-30 14:12 ` Heiko Stuebner
2022-04-22 17:09 ` [PATCHv1 14/19] gpio: rockchip: add support for rk3588 Sebastian Reichel
2022-04-22 20:35 ` Linus Walleij
2022-04-22 17:09 ` [PATCHv1 15/19] dt-bindings: serial: snps-dw-apb-uart: Add Rockchip RK3588 Sebastian Reichel
2022-04-23 10:02 ` Krzysztof Kozlowski
2022-04-22 17:09 ` [PATCHv1 16/19] dt-bindings: soc: rockchip: add initial rk3588 syscon compatibles Sebastian Reichel
2022-04-23 10:03 ` Krzysztof Kozlowski
2022-04-22 17:09 ` [PATCHv1 17/19] arm64: dts: rockchip: Add rk3588s pinctrl data Sebastian Reichel
2022-04-22 20:45 ` Linus Walleij
2022-04-22 17:09 ` [PATCHv1 18/19] arm64: dts: rockchip: Add base DT for rk3588 SoC Sebastian Reichel
2022-04-22 18:16 ` Robin Murphy
2022-04-25 18:14 ` Sebastian Reichel
2022-04-25 19:37 ` Peter Geis
2022-04-23 10:07 ` Krzysztof Kozlowski
2022-05-02 22:20 ` Rob Herring
2022-04-22 17:09 ` [PATCHv1 19/19] arm64: dts: rockchip: Add rk3588-evb1 board Sebastian Reichel
2022-04-23 10:09 ` Krzysztof Kozlowski
2022-04-25 19:44 ` Rob Herring
2022-04-22 20:44 ` [PATCHv1 00/19] Basic RK3588 Support Linus Walleij
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