From: Krzysztof Kozlowski <krzk@kernel.org>
To: "larry.lai" <larry.lai@yunjingtech.com>,
lee@kernel.org, andriy.shevchenko@linux.intel.com,
linus.walleij@linaro.org, pavel@ucw.cz
Cc: linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-leds@vger.kernel.org, GaryWang@aaeon.com.tw,
musa.lin@yunjingtech.com, jack.chang@yunjingtech.com,
noah.hung@yunjingtech.com
Subject: Re: [PATCH V7 2/3] pinctrl: Add support pin control for UP board CPLD/FPGA
Date: Wed, 1 Nov 2023 11:42:52 +0100 [thread overview]
Message-ID: <4a000265-6f92-439c-bb2c-66fbafa5c76c@kernel.org> (raw)
In-Reply-To: <20231031015119.29756-3-larry.lai@yunjingtech.com>
On 31/10/2023 02:51, larry.lai wrote:
> The UP Squared board <http://www.upboard.com> implements certain
> features (pin control) through an on-board FPGA.
>
> Reported-by: kernel test robot <lkp@intel.com>
Drop, LKP did not report this patch.
> Signed-off-by: Gary Wang <garywang@aaeon.com.tw>
> Signed-off-by: larry.lai <larry.lai@yunjingtech.com>
> ---
> PATCH V6 -> V7: There's no change.
> PATCH V5 -> PATCH V6
> (1) Refer 2023/08/10 Linus Walleij review, cleaned up coding style and
> addressed review comments.
> PATCH V4 -> PATCH V5
> (1) Fixed kernel test robot compiler warning.
> (2) Synchronizing upboard github to v1.0.5 tag.
> RFC 2023/04/25 -> PATCH V4
> (1) Fixed kernel test robot compiler warning.
> (2) Remove mistakes with wrong Reviewed-by tags.
> RFC 2022/11/23 -> RFC 2023/04/25
> (1) Refer 2022/12/08 Andy Shevchenko review, cleaned up coding style and
> addressed review comments.
> PATCH V3 -> RFC 2022/11/23:
> (1) Refer 2022/11/09 Linus Walleij review, cleaned up coding style and
> addressed review comments.
> PATCH V2 -> V3:
> There's no change.
> PATCH V1 -> V2:
> (1) Synchronized with upboard github to rc2
> (2) Refer 2022/10/19 Mark Brown and Andy Shevchenko review, we removed
> the regmap and acpi patches and implement in upboard pinctrl driver.
> (3) Refer 2022/10/19 Andy Shevchenko review, fixed the coding style
> issues, removed using gpio_xxxx API and removed including <linux/gpio.h>.
> ---
> drivers/pinctrl/Kconfig | 14 +
> drivers/pinctrl/Makefile | 1 +
> drivers/pinctrl/pinctrl-upboard.c | 1390 +++++++++++++++++++++++++++++
> 3 files changed, 1405 insertions(+)
> create mode 100644 drivers/pinctrl/pinctrl-upboard.c
>
> diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
> index 1cf74b0c42e5..cc8dae75289b 100644
> --- a/drivers/pinctrl/Kconfig
> +++ b/drivers/pinctrl/Kconfig
> @@ -483,6 +483,20 @@ config PINCTRL_THUNDERBAY
> rate control and direction control. This module will be
> called as pinctrl-thunderbay.
>
> +config PINCTRL_UPBOARD
> + tristate "UP board FPGA pin controller"
> + depends on (X86 && ACPI) || COMPILE_TEST
> + depends on MFD_INTEL_UPBOARD_FPGA
> + select GENERIC_PINCONF
> + select PINMUX
> + select PINCONF
> + help
> + Pin controller for the FPGA GPIO lines on UP boards. Due to the
> + hardware layout, these are meant to be controlled in tandem with their
> + corresponding Intel SoC GPIOs.
> + To compile this driver as a module, choose M here: the module
> + will be called pinctrl-upboard.
> +
> config PINCTRL_ZYNQ
> bool "Pinctrl driver for Xilinx Zynq"
> depends on ARCH_ZYNQ
> diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile
> index e76f5cdc64b0..c366706d36e7 100644
> --- a/drivers/pinctrl/Makefile
> +++ b/drivers/pinctrl/Makefile
> @@ -48,6 +48,7 @@ obj-$(CONFIG_PINCTRL_STMFX) += pinctrl-stmfx.o
> obj-$(CONFIG_PINCTRL_SX150X) += pinctrl-sx150x.o
> obj-$(CONFIG_PINCTRL_TB10X) += pinctrl-tb10x.o
> obj-$(CONFIG_PINCTRL_THUNDERBAY) += pinctrl-thunderbay.o
> +obj-$(CONFIG_PINCTRL_UPBOARD) += pinctrl-upboard.o
> obj-$(CONFIG_PINCTRL_ZYNQMP) += pinctrl-zynqmp.o
> obj-$(CONFIG_PINCTRL_ZYNQ) += pinctrl-zynq.o
>
> diff --git a/drivers/pinctrl/pinctrl-upboard.c b/drivers/pinctrl/pinctrl-upboard.c
> new file mode 100644
> index 000000000000..73d50a695aab
> --- /dev/null
> +++ b/drivers/pinctrl/pinctrl-upboard.c
> @@ -0,0 +1,1390 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * UP Board HAT pin controller driver
> + * remapping native pin to RPI pin and set CPLD pin dir
> + *
> + * Copyright (c) AAEON. All rights reserved.
> + *
> + * Authors: Gary Wang <garywang@aaeon.com.tw>
> + *
> + */
> +
> +#include <linux/dmi.h>
> +#include <linux/gpio/consumer.h>
> +#include <linux/gpio/driver.h>
> +#include <linux/kernel.h>
> +#include <linux/mfd/upboard-fpga.h>
> +#include <linux/module.h>
> +#include <linux/pinctrl/pinctrl.h>
> +#include <linux/pinctrl/pinmux.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/interrupt.h>
> +#include <linux/seq_file.h>
> +#include <linux/string.h>
> +
> +#include "core.h"
> +#include "intel/pinctrl-intel.h"
> +
...
> + {
> + .ident = BOARD_UP_ADLN01,
> + .matches = { /* UP 7000 */
> + DMI_EXACT_MATCH(DMI_SYS_VENDOR, "AAEON"),
> + DMI_EXACT_MATCH(DMI_BOARD_NAME, "UP-ADLN01"),
> + },
> + },
> + { } /* Terminating entry */
> +};
> +
> +static int __init upboard_pinctrl_probe(struct platform_device *pdev)
Probe functions are not __init. Also, this isn't even used.
> +{
> + struct upboard_fpga * const fpga = dev_get_drvdata(pdev->dev.parent);
> + struct pinctrl_desc *pctldesc;
> + struct upboard_pinctrl *pctrl;
> + struct upboard_pin *pins;
> + const struct dmi_system_id *system_id;
> + const unsigned int *rpi_mapping;
> + unsigned int ngpio;
> + int ret;
...
> + /* add acpi pin mapping according to external-gpios key */
> + ret = upboard_acpi_node_pin_mapping(fpga, pctrl,
> + "external",
> + dev_name(&pdev->dev),
> + 0);
> + if (ret)
> + return ret;
> +
> + upboard_alt_func_enable(&pctrl->chip, "I2C", pctrl->ident);
> + upboard_alt_func_enable(&pctrl->chip, "SPI", pctrl->ident);
> + upboard_alt_func_enable(&pctrl->chip, "UART", pctrl->ident);
> + upboard_alt_func_enable(&pctrl->chip, "I2S", pctrl->ident);
> + upboard_alt_func_enable(&pctrl->chip, "PWM", pctrl->ident);
> + upboard_alt_func_enable(&pctrl->chip, "ADC", pctrl->ident);
> + upboard_alt_func_enable(&pctrl->chip, "PINMUX", pctrl->ident);
> +
> + return ret;
> +}
> +
> +static struct platform_driver upboard_pinctrl_driver = {
> + .driver = {
> + .name = "upboard-pinctrl",
> + },
> +};
> +module_platform_driver_probe(upboard_pinctrl_driver, upboard_pinctrl_probe);
> +
> +MODULE_AUTHOR("Gary Wang <garywang@aaeon.com.tw>");
> +MODULE_DESCRIPTION("UP Board HAT pin controller driver");
> +MODULE_LICENSE("GPL v2");
> +MODULE_ALIAS("platform:upboard-pinctrl");
You should not need MODULE_ALIAS() in normal cases. If you need it,
usually it means your device ID table is wrong (e.g. misses either
entries or MODULE_DEVICE_TABLE()). MODULE_ALIAS() is not a substitute
for incomplete ID table.
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-11-01 10:43 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-31 1:51 [PATCH V7 0/3] Add support control UP board CPLD/FPGA pin control larry.lai
2023-10-31 1:51 ` [PATCH V7 1/3] mfd: Add support for UP board CPLD/FPGA larry.lai
2023-11-14 14:11 ` Andy Shevchenko
2023-11-24 9:11 ` GaryWang 汪之逸
2023-11-27 9:37 ` Lee Jones
2023-11-30 6:19 ` GaryWang 汪之逸
2023-12-01 8:19 ` larry
2023-10-31 1:51 ` [PATCH V7 2/3] pinctrl: Add support pin control " larry.lai
2023-11-01 10:42 ` Krzysztof Kozlowski [this message]
2023-11-13 14:15 ` Linus Walleij
2023-11-13 16:35 ` Andy Shevchenko
2023-11-14 14:18 ` Andy Shevchenko
2023-11-24 9:11 ` GaryWang 汪之逸
2023-11-30 6:19 ` GaryWang 汪之逸
2023-11-30 11:21 ` Lee Jones
2023-12-01 8:40 ` larry
2023-10-31 1:51 ` [PATCH V7 3/3] leds: Add support for UP board CPLD onboard LEDS larry.lai
2023-11-01 10:44 ` Krzysztof Kozlowski
2023-11-14 14:20 ` [PATCH V7 0/3] Add support control UP board CPLD/FPGA pin control Andy Shevchenko
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