From: Daniel Gonzalez Cabanelas <dgcbueu@gmail.com>
To: linux-gpio@vger.kernel.org
Subject: [PATCH 1/2] gpio: ath79: Drop lock field from struct ath79_gpio_ctrl
Date: Fri, 17 Feb 2017 16:07:34 +0100 [thread overview]
Message-ID: <5065304.0NhvqMbk9v@tool> (raw)
bgpio_init() already initialized a spin lock, use it and drop the
lock field defined in ath79_gpio_ctrl
Signed-off-by: Daniel Gonzalez Cabanelas <dgcbueu@gmail.com>
diff --git a/drivers/gpio/gpio-ath79.c b/drivers/gpio/gpio-ath79.c
index dc37dbe..5a189b4 100644
--- a/drivers/gpio/gpio-ath79.c
+++ b/drivers/gpio/gpio-ath79.c
@@ -32,7 +32,6 @@
struct ath79_gpio_ctrl {
struct gpio_chip gc;
void __iomem *base;
- spinlock_t lock;
unsigned long both_edges;
};
@@ -74,9 +73,9 @@ static void ath79_gpio_irq_unmask(struct irq_data *data)
u32 mask = BIT(irqd_to_hwirq(data));
unsigned long flags;
- spin_lock_irqsave(&ctrl->lock, flags);
+ spin_lock_irqsave(&ctrl->gc.bgpio_lock, flags);
ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, mask);
- spin_unlock_irqrestore(&ctrl->lock, flags);
+ spin_unlock_irqrestore(&ctrl->gc.bgpio_lock, flags);
}
static void ath79_gpio_irq_mask(struct irq_data *data)
@@ -85,9 +84,9 @@ static void ath79_gpio_irq_mask(struct irq_data *data)
u32 mask = BIT(irqd_to_hwirq(data));
unsigned long flags;
- spin_lock_irqsave(&ctrl->lock, flags);
+ spin_lock_irqsave(&ctrl->gc.bgpio_lock, flags);
ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, 0);
- spin_unlock_irqrestore(&ctrl->lock, flags);
+ spin_unlock_irqrestore(&ctrl->gc.bgpio_lock, flags);
}
static void ath79_gpio_irq_enable(struct irq_data *data)
@@ -96,10 +95,10 @@ static void ath79_gpio_irq_enable(struct irq_data *data)
u32 mask = BIT(irqd_to_hwirq(data));
unsigned long flags;
- spin_lock_irqsave(&ctrl->lock, flags);
+ spin_lock_irqsave(&ctrl->gc.bgpio_lock, flags);
ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_ENABLE, mask, mask);
ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, mask);
- spin_unlock_irqrestore(&ctrl->lock, flags);
+ spin_unlock_irqrestore(&ctrl->gc.bgpio_lock, flags);
}
static void ath79_gpio_irq_disable(struct irq_data *data)
@@ -108,10 +107,10 @@ static void ath79_gpio_irq_disable(struct irq_data *data)
u32 mask = BIT(irqd_to_hwirq(data));
unsigned long flags;
- spin_lock_irqsave(&ctrl->lock, flags);
+ spin_lock_irqsave(&ctrl->gc.bgpio_lock, flags);
ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, 0);
ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_ENABLE, mask, 0);
- spin_unlock_irqrestore(&ctrl->lock, flags);
+ spin_unlock_irqrestore(&ctrl->gc.bgpio_lock, flags);
}
static int ath79_gpio_irq_set_type(struct irq_data *data,
@@ -140,7 +139,7 @@ static int ath79_gpio_irq_set_type(struct irq_data *data,
return -EINVAL;
}
- spin_lock_irqsave(&ctrl->lock, flags);
+ spin_lock_irqsave(&ctrl->gc.bgpio_lock, flags);
if (flow_type == IRQ_TYPE_EDGE_BOTH) {
ctrl->both_edges |= mask;
@@ -165,7 +164,7 @@ static int ath79_gpio_irq_set_type(struct irq_data *data,
ath79_gpio_update_bits(
ctrl, AR71XX_GPIO_REG_INT_ENABLE, mask, mask);
- spin_unlock_irqrestore(&ctrl->lock, flags);
+ spin_unlock_irqrestore(&ctrl->gc.bgpio_lock, flags);
return 0;
}
@@ -191,7 +190,7 @@ static void ath79_gpio_irq_handler(struct irq_desc *desc)
chained_irq_enter(irqchip, desc);
- spin_lock_irqsave(&ctrl->lock, flags);
+ spin_lock_irqsave(&ctrl->gc.bgpio_lock, flags);
pending = ath79_gpio_read(ctrl, AR71XX_GPIO_REG_INT_PENDING);
@@ -203,7 +202,7 @@ static void ath79_gpio_irq_handler(struct irq_desc *desc)
both_edges, ~state);
}
- spin_unlock_irqrestore(&ctrl->lock, flags);
+ spin_unlock_irqrestore(&ctrl->gc.bgpio_lock, flags);
if (pending) {
for_each_set_bit(irq, &pending, gc->ngpio)
@@ -262,7 +261,6 @@ static int ath79_gpio_probe(struct platform_device *pdev)
if (!ctrl->base)
return -ENOMEM;
- spin_lock_init(&ctrl->lock);
err = bgpio_init(&ctrl->gc, &pdev->dev, 4,
ctrl->base + AR71XX_GPIO_REG_IN,
ctrl->base + AR71XX_GPIO_REG_SET,
reply other threads:[~2017-02-17 15:07 UTC|newest]
Thread overview: [no followups] expand[flat|nested] mbox.gz Atom feed
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5065304.0NhvqMbk9v@tool \
--to=dgcbueu@gmail.com \
--cc=linux-gpio@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).