* question: pin mux & gpio
@ 2013-10-24 1:28 David Cohen
2013-10-29 17:03 ` Linus Walleij
0 siblings, 1 reply; 3+ messages in thread
From: David Cohen @ 2013-10-24 1:28 UTC (permalink / raw)
To: linux-gpio@vger.kernel.org; +Cc: Linus Walleij
Hi,
I've got a question WRT pin muxing.
gpio-intel-mid registers are responsible to set alternative functions
to some pins. Despite pin mux is not directly related to gpio in
general, in this case it is.
Is there any other gpio driver doing this same task? Or maybe
suggestion about how to handle it?
Br, David Cohen
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: question: pin mux & gpio
2013-10-24 1:28 question: pin mux & gpio David Cohen
@ 2013-10-29 17:03 ` Linus Walleij
2013-10-29 18:00 ` David Cohen
0 siblings, 1 reply; 3+ messages in thread
From: Linus Walleij @ 2013-10-29 17:03 UTC (permalink / raw)
To: David Cohen; +Cc: linux-gpio@vger.kernel.org
On Wed, Oct 23, 2013 at 6:28 PM, David Cohen
<david.a.cohen@linux.intel.com> wrote:
> I've got a question WRT pin muxing.
> gpio-intel-mid registers are responsible to set alternative functions
> to some pins. Despite pin mux is not directly related to gpio in
> general, in this case it is.
I know this use case.
> Is there any other gpio driver doing this same task? Or maybe
> suggestion about how to handle it?
First read Documentation/pinctrl.txt :-)
Move the driver to drivers/pinctrl/pinctrl-intel-mid.c in the next
merge window, and add pin control interfaces in the style of the
other combined pin control+GPIO drivers there. Keeping one state
struct but exposing interfaces to both subsystems is perfectly
acceptable. Use GPIO ranges to cross-reference GPIO lines
to pins.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: question: pin mux & gpio
2013-10-29 17:03 ` Linus Walleij
@ 2013-10-29 18:00 ` David Cohen
0 siblings, 0 replies; 3+ messages in thread
From: David Cohen @ 2013-10-29 18:00 UTC (permalink / raw)
To: Linus Walleij; +Cc: linux-gpio@vger.kernel.org
Hi Linus,
On 10/29/2013 10:03 AM, Linus Walleij wrote:
> On Wed, Oct 23, 2013 at 6:28 PM, David Cohen
> <david.a.cohen@linux.intel.com> wrote:
>
>> I've got a question WRT pin muxing.
>> gpio-intel-mid registers are responsible to set alternative functions
>> to some pins. Despite pin mux is not directly related to gpio in
>> general, in this case it is.
>
> I know this use case.
>
>> Is there any other gpio driver doing this same task? Or maybe
>> suggestion about how to handle it?
>
> First read Documentation/pinctrl.txt :-)
>
> Move the driver to drivers/pinctrl/pinctrl-intel-mid.c in the next
> merge window, and add pin control interfaces in the style of the
> other combined pin control+GPIO drivers there. Keeping one state
> struct but exposing interfaces to both subsystems is perfectly
> acceptable. Use GPIO ranges to cross-reference GPIO lines
> to pins.
Thanks. I'll work on that change.
Br, David Cohen
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2013-10-29 17:56 UTC | newest]
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2013-10-24 1:28 question: pin mux & gpio David Cohen
2013-10-29 17:03 ` Linus Walleij
2013-10-29 18:00 ` David Cohen
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