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From: Ray Jui <rjui@broadcom.com>
To: Dmitry Torokhov <dtor@google.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
	Stephen Warren <swarren@wwwdotorg.org>,
	Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Kumar Gala <galak@codeaurora.org>,
	Grant Likely <grant.likely@linaro.org>,
	Christian Daudt <bcm@fixthebug.org>,
	Matt Porter <mporter@linaro.org>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Russell King <linux@arm.linux.org.uk>,
	Scott Branden <sbranden@broadcom.com>,
	Anatol Pomazau <anatol@google.com>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
	bcm-kernel-feedback-list@broadcom.com,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v3 3/4] pinctrl: cygnus: add initial IOMUX driver support
Date: Tue, 3 Feb 2015 11:29:36 -0800	[thread overview]
Message-ID: <54D121A0.6070602@broadcom.com> (raw)
In-Reply-To: <20150203174042.GA15969@dtor-ws>



On 2/3/2015 9:40 AM, Dmitry Torokhov wrote:
> Hi Ray,
> 
> On Mon, Feb 02, 2015 at 06:01:33PM -0800, Ray Jui wrote:
>> This adds the initial driver support for the Broadcom Cygnus IOMUX
>> controller. The Cygnus IOMUX controller supports group based mux
>> configuration but allows certain pins to be muxed to GPIO individually
>>
>> Signed-off-by: Ray Jui <rjui@broadcom.com>
>> Reviewed-by: Scott Branden <sbranden@broadcom.com>
> 
> Just a few random nits/comments...
> 
>> ---
>>  drivers/pinctrl/bcm/Kconfig              |   13 +
>>  drivers/pinctrl/bcm/Makefile             |    5 +-
>>  drivers/pinctrl/bcm/pinctrl-cygnus-mux.c | 1087 ++++++++++++++++++++++++++++++
>>  3 files changed, 1103 insertions(+), 2 deletions(-)
>>  create mode 100644 drivers/pinctrl/bcm/pinctrl-cygnus-mux.c
>>
>> diff --git a/drivers/pinctrl/bcm/Kconfig b/drivers/pinctrl/bcm/Kconfig
>> index bc6d048..eb13201 100644
>> --- a/drivers/pinctrl/bcm/Kconfig
>> +++ b/drivers/pinctrl/bcm/Kconfig
>> @@ -19,3 +19,16 @@ config PINCTRL_BCM2835
>>  	bool
>>  	select PINMUX
>>  	select PINCONF
>> +
>> +config PINCTRL_CYGNUS_MUX
>> +	bool "Broadcom Cygnus IOMUX driver"
>> +	depends on (ARCH_BCM_CYGNUS || COMPILE_TEST)
>> +	select PINMUX
>> +	select GENERIC_PINCONF
>> +	default ARCH_BCM_CYGNUS
>> +	help
>> +	  Say yes here to enable the Broadcom Cygnus IOMUX driver.
>> +
>> +	  The Broadcom Cygnus IOMUX driver supports group based IOMUX
>> +	  configuration, with the exception that certain individual pins
>> +	  can be overrided to GPIO function
>> diff --git a/drivers/pinctrl/bcm/Makefile b/drivers/pinctrl/bcm/Makefile
>> index 7ba80a3..bb6beb6 100644
>> --- a/drivers/pinctrl/bcm/Makefile
>> +++ b/drivers/pinctrl/bcm/Makefile
>> @@ -1,4 +1,5 @@
>>  # Broadcom pinctrl support
>>  
>> -obj-$(CONFIG_PINCTRL_BCM281XX)	+= pinctrl-bcm281xx.o
>> -obj-$(CONFIG_PINCTRL_BCM2835)	+= pinctrl-bcm2835.o
>> +obj-$(CONFIG_PINCTRL_BCM281XX)		+= pinctrl-bcm281xx.o
>> +obj-$(CONFIG_PINCTRL_BCM2835)		+= pinctrl-bcm2835.o
>> +obj-$(CONFIG_PINCTRL_CYGNUS_MUX)	+= pinctrl-cygnus-mux.o
>> diff --git a/drivers/pinctrl/bcm/pinctrl-cygnus-mux.c b/drivers/pinctrl/bcm/pinctrl-cygnus-mux.c
>> new file mode 100644
>> index 0000000..33565b4
>> --- /dev/null
>> +++ b/drivers/pinctrl/bcm/pinctrl-cygnus-mux.c
>> @@ -0,0 +1,1087 @@
>> +/* Copyright (C) 2014-2015 Broadcom Corporation
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation version 2.
>> + *
>> + * This program is distributed "as is" WITHOUT ANY WARRANTY of any
>> + * kind, whether express or implied; without even the implied warranty
>> + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * This file contains the Cygnus IOMUX driver that supports group based PINMUX
>> + * configuration. Although PINMUX configuration is mainly group based, the
>> + * Cygnus IOMUX controller allows certain pins to be individually muxed to GPIO
>> + * function, and therefore be controlled by the Cygnus ASIU GPIO controller
>> + */
>> +
>> +#include <linux/err.h>
>> +#include <linux/io.h>
>> +#include <linux/module.h>
>> +#include <linux/of.h>
>> +#include <linux/slab.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/pinctrl/pinctrl.h>
>> +#include <linux/pinctrl/pinmux.h>
>> +#include <linux/pinctrl/pinconf.h>
>> +#include <linux/pinctrl/pinconf-generic.h>
>> +#include "../core.h"
>> +#include "../pinctrl-utils.h"
>> +
>> +#define CYGNUS_NUM_IOMUX_REGS     8
>> +#define CYGNUS_NUM_MUX_PER_REG    8
>> +#define CYGNUS_NUM_IOMUX          (CYGNUS_NUM_IOMUX_REGS * \
>> +				   CYGNUS_NUM_MUX_PER_REG)
>> +
>> +/*
>> + * Cygnus IOMUX register description
>> + *
>> + * @offset: register offset for mux configuration of a group
>> + * @shift: bit shift for mux configuration of a group
>> + * @alt: alternate function to set to
>> + */
>> +struct cygnus_mux {
>> +	unsigned int offset;
>> +	unsigned int shift;
>> +	unsigned int alt;
>> +};
>> +
>> +/*
>> + * Keep track of Cygnus IOMUX configuration and prevent double configuration
>> + *
>> + * @cygnus_mux: Cygnus IOMUX register description
>> + * @is_configured: flag to indicate whether a mux setting has already been
>> + * configured
>> + */
>> +struct cygnus_mux_log {
>> +	struct cygnus_mux mux;
>> +	bool is_configured;
>> +};
>> +
>> +/*
>> + * Group based IOMUX configuration
>> + *
>> + * @name: name of the group
>> + * @pins: array of pins used by this group
>> + * @num_pins: total number of pins used by this group
>> + * @mux: Cygnus group based IOMUX configuration
>> + */
>> +struct cygnus_pin_group {
>> +	const char *name;
>> +	const unsigned *pins;
>> +	const unsigned num_pins;
>> +	const struct cygnus_mux mux;
> 
> Not: the last 2 consts are quite weird - if you want to make an instance
> of cygnus_pin_group immutable you declare it as a const (and I see you
> are already doing that below). With the structure as it laid out
> currently you can only do static initializers.
> 
Right. I'll remove the last two const.

>> +};
>> +
>> +/*
>> + * Cygnus mux function and supported pin groups
>> + *
>> + * @name: name of the function
>> + * @groups: array of groups that can be supported by this function
>> + * @num_groups: total number of groups that can be supported by this function
>> + */
>> +struct cygnus_pin_function {
>> +	const char *name;
>> +	const char * const *groups;
>> +	const unsigned num_groups;
> 
> Here as well.
> 
> ...
> 
Yes. Will remove the last const.

>> +
>> +/*
>> + * List of pins in Cygnus
>> + */
>> +static struct cygnus_pin cygnus_pins[] = {
> 
> const?
> 
I cannot make it const here, since the address of "gpio_mux" is later
passed to pinctrl_pin_desc's private data:

pins[i].drv_data = &cygnus_pins[i].gpio_mux;

>> +	CYGNUS_PIN_DESC(0, "ext_device_reset_n", 0, 0, 0),
>> +	CYGNUS_PIN_DESC(1, "chip_mode0", 0, 0, 0),
> 
> ...
> 
>> +#define CYGNUS_PIN_GROUP(group_name, off, sh, al)	\
>> +{							\
>> +	.name = #group_name"""_grp",			\
> 
> Why do we need extra pair of quotes? BTW we can also do
> 
> 	.name = __stringify(group_name) "_grp",
> 
Okay. I will change to use __stringify. Thanks.

>> +	.pins = group_name ## _pins,			\
>> +	.num_pins = ARRAY_SIZE(group_name ## _pins),	\
>> +	.mux = {					\
>> +		.offset = off,				\
>> +		.shift = sh,				\
>> +		.alt = al,				\
>> +	}						\
>> +}
> 
> ...
> 
>> +
>> +static struct pinctrl_ops cygnus_pinctrl_ops = {
> 
> const?
> 
Yes.

>> +	.get_groups_count = cygnus_get_groups_count,
>> +	.get_group_name = cygnus_get_group_name,
>> +	.get_group_pins = cygnus_get_group_pins,
>> +	.pin_dbg_show = cygnus_pin_dbg_show,
>> +	.dt_node_to_map = cygnus_dt_node_to_map,
>> +	.dt_free_map = pinctrl_utils_dt_free_map,
>> +};
>> +
>> +static int cygnus_get_functions_count(struct pinctrl_dev *pctrl_dev)
>> +{
>> +	struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
>> +
>> +	return pinctrl->num_functions;
>> +}
>> +
>> +static const char *cygnus_get_function_name(struct pinctrl_dev *pctrl_dev,
>> +					    unsigned selector)
>> +{
>> +	struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
>> +
>> +	return pinctrl->functions[selector].name;
>> +}
>> +
>> +static int cygnus_get_function_groups(struct pinctrl_dev *pctrl_dev,
>> +				      unsigned selector,
>> +				      const char * const **groups,
>> +				      unsigned * const num_groups)
>> +{
>> +	struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
>> +
>> +	*groups = pinctrl->functions[selector].groups;
>> +	*num_groups = pinctrl->functions[selector].num_groups;
>> +
>> +	return 0;
>> +}
>> +
>> +static int cygnus_pinmux_set(struct cygnus_pinctrl *pinctrl,
>> +			     const struct cygnus_pin_function *func,
>> +			     const struct cygnus_pin_group *grp,
>> +			     struct cygnus_mux_log *mux_log)
>> +{
>> +	const struct cygnus_mux *mux = &grp->mux;
>> +	int i;
>> +	u32 val, mask = 0x7;
>> +	unsigned long flags;
>> +
>> +	for (i = 0; i < CYGNUS_NUM_IOMUX; i++) {
>> +		if (mux->offset != mux_log[i].mux.offset ||
>> +		    mux->shift != mux_log[i].mux.shift)
>> +			continue;
>> +
>> +		/* match found if we reach here */
>> +
>> +		/* if this is a new configuration, just do it! */
>> +		if (!mux_log[i].is_configured)
>> +			break;
>> +
>> +		/*
>> +		 * IOMUX has been configured previously and one is trying to
>> +		 * configure it to a different function
>> +		 */
>> +		if (mux_log[i].mux.alt != mux->alt) {
>> +			dev_err(pinctrl->dev,
>> +				"double configuration error detected!\n");
>> +			dev_err(pinctrl->dev, "func:%s grp:%s\n",
>> +				func->name, grp->name);
>> +			return -EINVAL;
>> +		} else {
>> +			/*
>> +			 * One tries to configure it to the same function.
>> +			 * Just quit and don't bother
>> +			 */
>> +			return 0;
>> +		}
>> +	}
>> +
>> +	mux_log[i].mux.alt = mux->alt;
>> +	mux_log[i].is_configured = true;
>> +
>> +	spin_lock_irqsave(&pinctrl->lock, flags);
>> +
>> +	val = readl(pinctrl->base0 + grp->mux.offset);
>> +	val &= ~(mask << grp->mux.shift);
>> +	val |= grp->mux.alt << grp->mux.shift;
>> +	writel(val, pinctrl->base0 + grp->mux.offset);
>> +
>> +	spin_unlock_irqrestore(&pinctrl->lock, flags);
>> +
>> +	return 0;
>> +}
>> +
>> +static int cygnus_pinmux_set_mux(struct pinctrl_dev *pctrl_dev,
>> +				 unsigned func_select, unsigned grp_select)
>> +{
>> +	struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
>> +	const struct cygnus_pin_function *func =
>> +		&pinctrl->functions[func_select];
>> +	const struct cygnus_pin_group *grp = &pinctrl->groups[grp_select];
>> +
>> +	dev_dbg(pctrl_dev->dev, "func:%u name:%s grp:%u name:%s\n",
>> +		func_select, func->name, grp_select, grp->name);
>> +
>> +	dev_dbg(pctrl_dev->dev, "offset:0x%08x shift:%u alt:%u\n",
>> +		grp->mux.offset, grp->mux.shift, grp->mux.alt);
>> +
>> +	return cygnus_pinmux_set(pinctrl, func, grp, pinctrl->mux_log);
>> +}
>> +
>> +static int cygnus_gpio_request_enable(struct pinctrl_dev *pctrl_dev,
>> +				      struct pinctrl_gpio_range *range,
>> +				      unsigned pin)
>> +{
>> +	struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
>> +	struct cygnus_gpio_mux *mux = pctrl_dev->desc->pins[pin].drv_data;
> 
> const?
> 
Yes.

>> +	u32 val;
>> +	unsigned long flags;
>> +
>> +	/* not all pins support GPIO pinmux override */
>> +	if (!mux->is_supported)
>> +		return -ENOTSUPP;
>> +
>> +	spin_lock_irqsave(&pinctrl->lock, flags);
>> +
>> +	val = readl(pinctrl->base1 + mux->offset);
>> +	val |= 0x3 << mux->shift;
>> +	writel(val, pinctrl->base1 + mux->offset);
>> +
>> +	spin_unlock_irqrestore(&pinctrl->lock, flags);
>> +
>> +	dev_dbg(pctrl_dev->dev,
>> +		"gpio request enable pin=%u offset=0x%x shift=%u\n",
>> +		pin, mux->offset, mux->shift);
>> +
>> +	return 0;
>> +}
>> +
>> +static void cygnus_gpio_disable_free(struct pinctrl_dev *pctrl_dev,
>> +				     struct pinctrl_gpio_range *range,
>> +				     unsigned pin)
>> +{
>> +	struct cygnus_pinctrl *pinctrl = pinctrl_dev_get_drvdata(pctrl_dev);
>> +	struct cygnus_gpio_mux *mux = pctrl_dev->desc->pins[pin].drv_data;
>> +	u32 val;
>> +	unsigned long flags;
>> +
>> +	if (!mux->is_supported)
>> +		return;
>> +
>> +	spin_lock_irqsave(&pinctrl->lock, flags);
>> +
>> +	val = readl(pinctrl->base1 + mux->offset);
>> +	val &= ~(0x3 << mux->shift);
>> +	writel(val, pinctrl->base1 + mux->offset);
>> +
>> +	spin_unlock_irqrestore(&pinctrl->lock, flags);
>> +
>> +	dev_err(pctrl_dev->dev,
>> +		"gpio disable free pin=%u offset=0x%x shift=%u\n",
>> +		pin, mux->offset, mux->shift);
>> +}
>> +
>> +static struct pinmux_ops cygnus_pinmux_ops = {
> 
> const?
> 
Yes.

>> +	.get_functions_count = cygnus_get_functions_count,
>> +	.get_function_name = cygnus_get_function_name,
>> +	.get_function_groups = cygnus_get_function_groups,
>> +	.set_mux = cygnus_pinmux_set_mux,
>> +	.gpio_request_enable = cygnus_gpio_request_enable,
>> +	.gpio_disable_free = cygnus_gpio_disable_free,
>> +};
>> +
>> +static struct pinctrl_desc cygnus_pinctrl_desc = {
>> +	.name = "cygnus-pinmux",
>> +	.pctlops = &cygnus_pinctrl_ops,
>> +	.pmxops = &cygnus_pinmux_ops,
>> +};
>> +
>> +static int cygnus_mux_log_init(struct cygnus_pinctrl *pinctrl)
>> +{
>> +	struct cygnus_mux_log *log;
>> +	unsigned int i, j;
>> +
>> +	pinctrl->mux_log = devm_kcalloc(pinctrl->dev, CYGNUS_NUM_IOMUX,
>> +					sizeof(struct cygnus_mux_log),
>> +					GFP_KERNEL);
>> +	if (!pinctrl->mux_log)
>> +		return -ENOMEM;
>> +
>> +	log = pinctrl->mux_log;
>> +	for (i = 0; i < CYGNUS_NUM_IOMUX_REGS; i++) {
>> +		for (j = 0; j < CYGNUS_NUM_MUX_PER_REG; j++) {
>> +			log = &pinctrl->mux_log[i * CYGNUS_NUM_MUX_PER_REG
>> +				+ j];
>> +			log->mux.offset = i * 4;
>> +			log->mux.shift = j * 4;
>> +			log->mux.alt = 0;
>> +			log->is_configured = false;
>> +		}
>> +	}
>> +
>> +	return 0;
>> +}
>> +
>> +static int cygnus_pinmux_probe(struct platform_device *pdev)
>> +{
>> +	struct cygnus_pinctrl *pinctrl;
>> +	struct resource *res;
>> +	int i, ret;
>> +	struct pinctrl_pin_desc *pins;
>> +	unsigned num_pins = ARRAY_SIZE(cygnus_pins);
>> +
>> +	pinctrl = devm_kzalloc(&pdev->dev, sizeof(*pinctrl), GFP_KERNEL);
>> +	if (!pinctrl)
>> +		return -ENOMEM;
>> +
>> +	pinctrl->dev = &pdev->dev;
>> +	platform_set_drvdata(pdev, pinctrl);
>> +	spin_lock_init(&pinctrl->lock);
>> +
>> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> +	pinctrl->base0 = devm_ioremap_resource(&pdev->dev, res);
>> +	if (IS_ERR(pinctrl->base0)) {
>> +		dev_err(&pdev->dev, "unable to map I/O space\n");
>> +		return PTR_ERR(pinctrl->base0);
>> +	}
>> +
>> +	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
>> +	pinctrl->base1 = devm_ioremap_resource(&pdev->dev, res);
>> +	if (IS_ERR(pinctrl->base1)) {
>> +		dev_err(&pdev->dev, "unable to map I/O space\n");
>> +		return PTR_ERR(pinctrl->base1);
>> +	}
>> +
>> +	ret = cygnus_mux_log_init(pinctrl);
>> +	if (ret) {
>> +		dev_err(&pdev->dev, "unable to initialize IOMUX log\n");
>> +		return ret;
>> +	}
>> +
>> +	pins = devm_kcalloc(&pdev->dev, num_pins, sizeof(*pins), GFP_KERNEL);
>> +	if (!pins)
>> +		return -ENOMEM;
>> +
>> +	for (i = 0; i < num_pins; i++) {
>> +		pins[i].number = cygnus_pins[i].pin;
>> +		pins[i].name = cygnus_pins[i].name;
>> +		pins[i].drv_data = &cygnus_pins[i].gpio_mux;
>> +	}
>> +
>> +	pinctrl->groups = cygnus_pin_groups;
>> +	pinctrl->num_groups = ARRAY_SIZE(cygnus_pin_groups);
>> +	pinctrl->functions = cygnus_pin_functions;
>> +	pinctrl->num_functions = ARRAY_SIZE(cygnus_pin_functions);
>> +	cygnus_pinctrl_desc.pins = pins;
>> +	cygnus_pinctrl_desc.npins = num_pins;
>> +
>> +	pinctrl->pctl = pinctrl_register(&cygnus_pinctrl_desc, &pdev->dev,
>> +			pinctrl);
>> +	if (!pinctrl->pctl) {
>> +		dev_err(&pdev->dev, "unable to register Cygnus IOMUX pinctrl\n");
>> +		return -EINVAL;
>> +	}
>> +
>> +	return 0;
>> +}
>> +
>> +static struct of_device_id cygnus_pinmux_of_match[] = {
>> +	{ .compatible = "brcm,cygnus-pinmux" },
>> +	{ }
>> +};
>> +
>> +static struct platform_driver cygnus_pinmux_driver = {
>> +	.driver = {
>> +		.name = "cygnus-pinmux",
>> +		.of_match_table = cygnus_pinmux_of_match,
>> +	},
>> +	.probe = cygnus_pinmux_probe,
> 
> You also need to either provide remove() method or disallow unbinding
> via sysfs by setting suppress_bind_attrs in platform driver.
> 
I do not expect this driver to ever be compiled as module and
uninstalled at runtime. I'll add .suppress_bind_attrs = true, thanks!
>> +};
>> +
>> +static int __init cygnus_pinmux_init(void)
>> +{
>> +	return platform_driver_register(&cygnus_pinmux_driver);
>> +}
>> +arch_initcall(cygnus_pinmux_init);
>> +
>> +MODULE_AUTHOR("Ray Jui <rjui@broadcom.com>");
>> +MODULE_DESCRIPTION("Broadcom Cygnus IOMUX driver");
>> +MODULE_LICENSE("GPL v2");
>> -- 
>> 1.7.9.5
>>
> 
> Thanks.
> 
Thanks for the review!

Ray

  reply	other threads:[~2015-02-03 19:29 UTC|newest]

Thread overview: 118+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <Ray Jui <rjui@broadcom.com>
2014-12-04 21:56 ` [PATCH 0/4] Add pinctrl support to Broadcom Cygnus SoC Ray Jui
2014-12-04 21:56   ` [PATCH 1/4] pinctrl: Broadcom Cygnus pinctrl device tree binding Ray Jui
2014-12-04 22:16     ` Belisko Marek
2014-12-04 22:35       ` Ray Jui
2014-12-04 21:56   ` [PATCH 2/4] pinctrl: cygnus: add initial pinctrl support Ray Jui
2014-12-04 21:56   ` [PATCH 3/4] ARM: mach-bcm: enable pinctrl support for Cygnus Ray Jui
2014-12-04 21:56   ` [PATCH 4/4] ARM: dts: enable pinctrl for Broadcom Cygnus Ray Jui
2014-12-05 19:51 ` [PATCH v2 0/4] Add pinctrl support to Broadcom Cygnus SoC Ray Jui
     [not found]   ` <1417809069-26510-1-git-send-email-rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
2014-12-05 19:51     ` [PATCH v2 1/4] pinctrl: Broadcom Cygnus pinctrl device tree binding Ray Jui
2014-12-05 19:51   ` [PATCH v2 2/4] pinctrl: cygnus: add initial pinctrl support Ray Jui
2014-12-05 19:51   ` [PATCH v2 3/4] ARM: mach-bcm: enable pinctrl support for Cygnus Ray Jui
2014-12-05 19:51   ` [PATCH v2 4/4] ARM: dts: enable pinctrl for Broadcom Cygnus Ray Jui
2014-12-08  2:38 ` [PATCH v2 0/5] Add gpio support to Broadcom Cygnus SoC Ray Jui
2014-12-08  2:38   ` [PATCH v2 1/5] gpio: Cygnus: define Broadcom Cygnus GPIO binding Ray Jui
2014-12-08 11:22     ` Arnd Bergmann
2014-12-08 16:55       ` Ray Jui
2014-12-08 17:11         ` Arnd Bergmann
2014-12-08  2:38   ` [PATCH v2 2/5] gpio: Cygnus: add GPIO driver Ray Jui
2014-12-08  2:38   ` [PATCH v2 3/5] ARM: mach-bcm: Enable GPIO support for Cygnus Ray Jui
2014-12-08  2:38   ` [PATCH v2 4/5] ARM: dts: enable GPIO for Broadcom Cygnus Ray Jui
2014-12-08  2:38   ` [PATCH v2 5/5] MAINTAINERS: Entry for Cygnus GPIO driver Ray Jui
2014-12-08 18:47 ` [PATCH v3 0/5] Add gpio support to Broadcom Cygnus SoC Ray Jui
2014-12-08 18:47   ` [PATCH v2 " Ray Jui
     [not found]     ` <1418064468-8512-2-git-send-email-rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
2014-12-08 18:48       ` Ray Jui
2014-12-08 18:47   ` [PATCH v3 1/5] gpio: Cygnus: define Broadcom Cygnus GPIO binding Ray Jui
2014-12-08 19:38     ` Arnd Bergmann
2014-12-08 19:45       ` Ray Jui
     [not found]   ` <1418064468-8512-1-git-send-email-rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
2014-12-08 18:47     ` [PATCH v3 2/5] gpio: Cygnus: add GPIO driver Ray Jui
2014-12-08 18:47   ` [PATCH v3 3/5] ARM: mach-bcm: Enable GPIO support for Cygnus Ray Jui
2014-12-08 18:47   ` [PATCH v3 4/5] ARM: dts: enable GPIO for Broadcom Cygnus Ray Jui
2014-12-08 18:47   ` [PATCH v3 5/5] MAINTAINERS: Entry for Cygnus GPIO driver Ray Jui
2014-12-08 20:41 ` [PATCH v4 0/5] Add gpio support to Broadcom Cygnus SoC Ray Jui
2014-12-08 20:41   ` [PATCH v4 1/5] gpio: Cygnus: define Broadcom Cygnus GPIO binding Ray Jui
2014-12-08 20:41   ` [PATCH v4 2/5] gpio: Cygnus: add GPIO driver Ray Jui
2014-12-10 10:34     ` Alexandre Courbot
     [not found]       ` <CAAVeFuJ875fvEwPbnc-Eewsw4Rp7hLbv7nXWBb=OgvLwhQBVvQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-12-11  1:30         ` Ray Jui
2014-12-08 20:41   ` [PATCH v4 3/5] ARM: mach-bcm: Enable GPIO support for Cygnus Ray Jui
2014-12-08 20:41   ` [PATCH v4 4/5] ARM: dts: enable GPIO for Broadcom Cygnus Ray Jui
2014-12-08 20:41   ` [PATCH v4 5/5] MAINTAINERS: Entry for Cygnus GPIO driver Ray Jui
2014-12-12  0:05 ` [PATCH v5 0/3] Add gpio support to Broadcom Cygnus SoC Ray Jui
2014-12-12  0:05   ` [PATCH v5 1/3] gpio: Cygnus: define Broadcom Cygnus GPIO binding Ray Jui
2014-12-12 12:08     ` Arnd Bergmann
2014-12-12 13:05       ` Alexandre Courbot
2014-12-12 15:28         ` Arnd Bergmann
2014-12-15 21:35           ` Ray Jui
2014-12-15 21:57             ` Arnd Bergmann
2014-12-16  0:08               ` Ray Jui
2014-12-17  2:52               ` Alexandre Courbot
2015-01-13  8:01               ` Linus Walleij
2014-12-17  2:45           ` Alexandre Courbot
2014-12-17 10:26             ` Arnd Bergmann
2014-12-17 13:16               ` Alexandre Courbot
2014-12-17 10:44             ` Russell King - ARM Linux
2014-12-17 13:13               ` Alexandre Courbot
2015-01-13  8:06               ` Linus Walleij
     [not found]                 ` <CACRpkdZbGjNecrggrFr_18zjobXMBpkrSjBMAUfyfs2ZCebB0w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-01-13 11:41                   ` Russell King - ARM Linux
2015-01-16 10:18                     ` Linus Walleij
2014-12-12 17:17         ` Ray Jui
2014-12-12  0:05   ` [PATCH v5 2/3] gpio: Cygnus: add GPIO driver Ray Jui
2014-12-12  0:05   ` [PATCH v5 3/3] ARM: dts: enable GPIO for Broadcom Cygnus Ray Jui
2015-02-03  2:01 ` [PATCH v3 0/4] Add pinctrl support to Broadcom Cygnus SoC Ray Jui
2015-02-03  2:01   ` [PATCH v3 1/4] pinctrl: bcm: consolidate Broadcom pinctrl drivers Ray Jui
     [not found]   ` <1422928894-20716-1-git-send-email-rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
2015-02-03  2:01     ` [PATCH v3 2/4] pinctrl: Broadcom Cygnus pinctrl device tree binding Ray Jui
2015-02-03  2:01   ` [PATCH v3 3/4] pinctrl: cygnus: add initial IOMUX driver support Ray Jui
2015-02-03 17:40     ` Dmitry Torokhov
2015-02-03 19:29       ` Ray Jui [this message]
2015-02-03 20:00         ` Dmitry Torokhov
2015-02-03 20:16           ` Ray Jui
2015-02-03  2:01   ` [PATCH v3 4/4] ARM: dts: enable IOMUX for Broadcom Cygnus Ray Jui
2015-02-04  1:09 ` [PATCH v7 0/4] Add gpio/pinconf support to Broadcom Cygnus SoC Ray Jui
     [not found]   ` <1423012148-22560-1-git-send-email-rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
2015-02-04  1:09     ` [PATCH v7 1/4] pinctrl: Cygnus: define Broadcom Cygnus GPIO/PINCONF binding Ray Jui
2015-02-04  1:09     ` [PATCH v7 2/4] pinctrl: cygnus: add gpio/pinconf driver Ray Jui
2015-02-04  1:41       ` Dmitry Torokhov
2015-02-04  2:19         ` Ray Jui
2015-02-04  1:09   ` [PATCH v7 3/4] ARM: dts: enable GPIO for Broadcom Cygnus Ray Jui
2015-02-04  1:09   ` [PATCH v7 4/4] ARM: dts: cygnus: enable GPIO based hook detection Ray Jui
     [not found] ` <Ray Jui <rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
2014-12-06  0:40   ` [PATCH 0/5] Add gpio support to Broadcom Cygnus SoC Ray Jui
2014-12-06  0:40     ` [PATCH 1/5] gpio: Cygnus: define Broadcom Cygnus GPIO binding Ray Jui
2015-01-13  7:57       ` Linus Walleij
2015-01-13 17:07         ` Ray Jui
2014-12-06  0:40     ` [PATCH 2/5] gpio: Cygnus: add GPIO driver Ray Jui
     [not found]       ` <1417826408-1600-3-git-send-email-rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
2014-12-06  1:28         ` Joe Perches
2014-12-06  2:14           ` Ray Jui
2014-12-06  2:34             ` Joe Perches
2014-12-06  3:41               ` Ray Jui
2014-12-06  4:24                 ` Joe Perches
2014-12-08  1:34                   ` Ray Jui
2014-12-08  1:59             ` Ray Jui
2014-12-06  0:40     ` [PATCH 3/5] ARM: mach-bcm: Enable GPIO support for Cygnus Ray Jui
2014-12-06  0:40     ` [PATCH 4/5] ARM: dts: enable GPIO for Broadcom Cygnus Ray Jui
2014-12-06  0:40     ` [PATCH 5/5] MAINTAINERS: Entry for Cygnus GPIO driver Ray Jui
2014-12-16  2:18   ` [PATCH v6 0/3] Add gpio support to Broadcom Cygnus SoC Ray Jui
2014-12-16  2:18     ` [PATCH v6 1/3] gpio: Cygnus: define Broadcom Cygnus GPIO binding Ray Jui
2014-12-16  2:18     ` [PATCH v6 2/3] gpio: Cygnus: add GPIO driver Ray Jui
2015-01-13  8:53       ` Linus Walleij
2015-01-13 17:05         ` Ray Jui
2015-01-16 10:14           ` Linus Walleij
2015-01-17  0:11             ` Ray Jui
2015-01-20  9:53               ` Linus Walleij
2015-01-20 19:17                 ` Ray Jui
2014-12-16  2:18     ` [PATCH v6 3/3] ARM: dts: enable GPIO for Broadcom Cygnus Ray Jui
2014-12-16  8:56     ` [PATCH v6 0/3] Add gpio support to Broadcom Cygnus SoC Arnd Bergmann
2014-12-17  8:06     ` Alexandre Courbot
2015-02-04  2:09   ` [PATCH v4 0/4] Add pinctrl " Ray Jui
2015-02-04  2:09     ` [PATCH v4 1/4] pinctrl: bcm: consolidate Broadcom pinctrl drivers Ray Jui
     [not found]       ` <1423015801-26967-2-git-send-email-rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
2015-03-04  9:07         ` Linus Walleij
     [not found]           ` <CACRpkdaiM+mqGg43BT1Kr-CNi8+_U4KgZM4iZocv9+ovHL5hLQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-03-04 17:31             ` Ray Jui
     [not found]     ` <1423015801-26967-1-git-send-email-rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
2015-02-04  2:09       ` [PATCH v4 2/4] pinctrl: Broadcom Cygnus pinctrl device tree binding Ray Jui
2015-02-04  2:10     ` [PATCH v4 3/4] pinctrl: cygnus: add initial IOMUX driver support Ray Jui
2015-02-04  2:10     ` [PATCH v4 4/4] ARM: dts: enable IOMUX for Broadcom Cygnus Ray Jui
2015-02-25 19:29     ` [PATCH v4 0/4] Add pinctrl support to Broadcom Cygnus SoC Dmitry Torokhov
2015-02-04 17:20 ` [PATCH v8 0/4] Add gpio/pinconf " Ray Jui
2015-02-04 17:21   ` [PATCH v8 1/4] pinctrl: Cygnus: define Broadcom Cygnus GPIO/PINCONF binding Ray Jui
2015-02-04 17:21   ` [PATCH v8 2/4] pinctrl: cygnus: add gpio/pinconf driver Ray Jui
2015-02-09 19:20     ` Dmitry Torokhov
2015-02-10 21:47       ` Ray Jui
2015-02-04 17:21   ` [PATCH v8 3/4] ARM: dts: enable GPIO for Broadcom Cygnus Ray Jui
2015-02-04 17:21   ` [PATCH v8 4/4] ARM: dts: cygnus: enable GPIO based hook detection Ray Jui

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