From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Thompson Subject: Re: [PATCH v7 05/15] dt-bindings: Document the STM32 reset bindings Date: Tue, 05 May 2015 17:07:29 +0100 Message-ID: <5548EAC1.7010002@linaro.org> References: <1430410844-16062-1-git-send-email-mcoquelin.stm32@gmail.com> <1430410844-16062-6-git-send-email-mcoquelin.stm32@gmail.com> <55433467.2010603@linaro.org> <5544A069.5000808@linaro.org> <5548CEA2.8020807@linaro.org> <1430840557.3035.60.camel@pengutronix.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1430840557.3035.60.camel@pengutronix.de> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Philipp Zabel , Maxime Coquelin Cc: Mark Rutland , "linux-doc@vger.kernel.org" , Linus Walleij , Will Deacon , Stefan Agner , Nikolay Borisov , Peter Meerwald , "linux-api@vger.kernel.org" , Jiri Slaby , Mauro Carvalho Chehab , Linux-Arch , Russell King , Pawel Moll , Jonathan Corbet , Lee Jones , Daniel Lezcano , Chanwoo Choi , Andy Shevchenko , Antti Palosaari , Geert Uytterhoeven , "linux-serial@vger.kernel.org" , =?UTF-8?B?VXdlIEtsZ List-Id: linux-gpio@vger.kernel.org On 05/05/15 16:42, Philipp Zabel wrote: > Am Dienstag, den 05.05.2015, 17:19 +0200 schrieb Maxime Coquelin: >>>> For example, includes/dt-bindings/mfd/stm32f4-rcc.h would look like: >>>> >>>> #define GPIOA 0 >>>> #define GPIOB 1 >>>> ... >>>> #define LTDC 186 > > That looks a bit fragile. > At least the defines for the indices should be properly namespaced, > check out include/dt-bindings/gpio/tegra-gpio.h for a similar case. Good point. >>>> #define STM32F4_RESET(x) (x + 128) >>>> #define STM32F4_CLOCK(x) (x + 384) Thinking more about this point, if we are going to follow hardware if might be better to have: #define STM32F4_RCC_AHB1_GPIOA 0 #define STM32F4_RCC_AHB1_GPIOA 1 ... #define STM32F4_RCC_APB2_LTDC 26 #define STM32F4_AHB1_RESET(x) (STM32F4_RCC_AHB1_##x##_BIT + (0x10 * 8)) #define STM32F4_AHB2_RESET(x) (STM32F4_RCC_AHB2_##x##_BIT + (0x14 * 8)) ... #define STM32F4_APB2_RESET(x) (STM32F4_RCC_APB2_##x##_BIT + (0x24 * 8)) Its more typing (or copy 'n pasting) by at least every number now maps directly to the datasheet. >>>> >>>> Then, in DT, a reset would be described like this: >>>> >>>> timer2 { >>>> resets = <&rcc STM32F4_RESET(TIM2)>; >>>> }; >>>> >>>> Phillip, Daniel, does that look acceptable to you? >>> >>> >>> Doesn't look unreasonable. >>> >>> I am a little uneasy simply because there are very few similar header files >>> in that directory but I haven't thought of a better idea. >> >> Since this file will be shared by both clock and reset drivers, I >> don't see better option. >> I will implement it in v8 if Philipp agrees. > > Are the device tree maintainers happy with this idiom spreading? > Except for the point above, I think this is acceptable. > > regards > Philipp >