From: Jon Hunter <jonathanh@nvidia.com>
To: Laxman Dewangan <ldewangan@nvidia.com>,
swarren@wwwdotorg.org, linus.walleij@linaro.org,
gnurou@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com,
thierry.reding@gmail.com
Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org
Subject: Re: [PATCH 2/6] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()
Date: Tue, 3 May 2016 12:42:59 +0100 [thread overview]
Message-ID: <57288EC3.3090001@nvidia.com> (raw)
In-Reply-To: <1462191434-28933-3-git-send-email-ldewangan@nvidia.com>
On 02/05/16 13:17, Laxman Dewangan wrote:
> The function tegra_pmc_readl() returns the u32 type data and hence
> change the data type of variable where this data is stored to u32
> type.
>
> Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
>
> ---
> Changes from V1:
> -This is new in series as per discussion on V1 series to use u32 for
> tegra_pmc_readl.
> ---
> drivers/soc/tegra/pmc.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c
> index 2c3f1f9..fc4f7b2 100644
> --- a/drivers/soc/tegra/pmc.c
> +++ b/drivers/soc/tegra/pmc.c
> @@ -878,7 +878,7 @@ static int tegra_io_rail_prepare(unsigned int id, unsigned long *request,
> static int tegra_io_rail_poll(unsigned long offset, unsigned long mask,
> unsigned long val, unsigned long timeout)
> {
> - unsigned long value;
> + u32 value;
You also need to make mask and val a u32.
Jon
next prev parent reply other threads:[~2016-05-03 11:43 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-02 12:17 [PATCH 0/6] soc/tegra: Add support for IO pads control via pinctrl interface Laxman Dewangan
2016-05-02 12:17 ` [PATCH 2/6] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl() Laxman Dewangan
2016-05-03 11:42 ` Jon Hunter [this message]
2016-05-02 12:17 ` [PATCH 3/6] soc/tegra: pmc: Add support for IO pads power state and voltage Laxman Dewangan
[not found] ` <1462191434-28933-4-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-03 12:34 ` Jon Hunter
[not found] ` <57289AC0.4090604-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-03 12:31 ` Laxman Dewangan
[not found] ` <57289A2B.7040501-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-03 12:55 ` Jon Hunter
2016-05-03 12:48 ` Laxman Dewangan
[not found] ` <57289E35.8040400-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-03 13:12 ` Jon Hunter
2016-05-03 13:07 ` Laxman Dewangan
[not found] ` <1462191434-28933-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-02 12:17 ` [PATCH 1/6] soc/tegra: pmc: Use BIT macro for register field definition Laxman Dewangan
2016-05-02 12:17 ` [PATCH 4/6] soc/tegra: pmc: Register PMC child devices as platform device Laxman Dewangan
2016-05-03 12:36 ` Jon Hunter
2016-05-03 15:26 ` Jon Hunter
2016-05-03 11:38 ` [PATCH 0/6] soc/tegra: Add support for IO pads control via pinctrl interface Jon Hunter
2016-05-02 12:17 ` [PATCH 5/6] pinctrl: tegra: Add DT binding for io pads control Laxman Dewangan
2016-05-03 12:44 ` Jon Hunter
2016-05-03 12:54 ` Laxman Dewangan
2016-05-03 13:33 ` Jon Hunter
2016-05-02 12:17 ` [PATCH 6/6] pinctrl: tegra: Add driver to configure voltage and power state of io pads Laxman Dewangan
[not found] ` <1462191434-28933-7-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-11 9:19 ` Linus Walleij
[not found] ` <CACRpkdbvCQr11hjCBoeOO+8-MLUbwXAjv9xW=jKR=Y9hZO5sjA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-05-11 16:07 ` Stephen Warren
2016-05-12 10:30 ` Jon Hunter
2016-05-12 19:02 ` Javier Martinez Canillas
2016-05-12 19:48 ` Jon Hunter
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