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From: Jon Hunter <jonathanh@nvidia.com>
To: Laxman Dewangan <ldewangan@nvidia.com>,
	swarren@wwwdotorg.org, linus.walleij@linaro.org,
	gnurou@gmail.com, robh+dt@kernel.org, mark.rutland@arm.com,
	thierry.reding@gmail.com
Cc: linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org
Subject: Re: [PATCH 5/6] pinctrl: tegra: Add DT binding for io pads control
Date: Tue, 3 May 2016 14:33:25 +0100	[thread overview]
Message-ID: <5728A8A5.4080603@nvidia.com> (raw)
In-Reply-To: <57289F88.6040203@nvidia.com>


On 03/05/16 13:54, Laxman Dewangan wrote:
> 
> On Tuesday 03 May 2016 06:14 PM, Jon Hunter wrote:
>> On 02/05/16 13:17, Laxman Dewangan wrote:
>>> +
>>> +The voltage supported on the pads are 1.8V and 3.3V. The enums are
>>> defined as:
>>> +    For 1.8V, use TEGRA_IO_PAD_POWER_SOURCE_1800000UV
>>> +    For 3.3V, use TEGRA_IO_PAD_POWER_SOURCE_3300000UV
>> Are these still necessary now that the driver is using uV? Can't we just
>> use integer values for 1800000 and 3300000 in the DTS directly?
>>
> The config param and value are packed in u32 with 16bit each So we can
> not make uV in 16bit until we do conversion of uV->mV.
> Hence suggestion came from Stephen that we can have enum for Nvidia
> specific and what actually it supports by HW. HW does not support any
> other voltage.

Ah yes I see.

> 
>>> +Required subnode-properties:
>>> +==========================
>>> +- pins : An array of strings. Each string contains the name of an IO
>>> pads. Valid
>>> +     values for these names are listed below.
>> Please see my previous comments.
> 
> This is taken from other dt binding docs for description. We can have
> array of string.

OK.

> As all value of pins are not supporting all property and hence I
> explicitly wrote under properties.

I don't find it very clear. I thought all pins support the low power
modes so I think it is clearer to list all the pin names under the pins
description.

>>> +Optional subnode-properties:
>>> +==========================
>>> +-nvidia,power-source-voltage:    Integer. The voltage level of IO
>>> pads. The
>> I think I prefer nvidia,io-voltage or something. You can describe what
>> this means in this doc. In fact, the current description here does not
>> explicitly state that this voltage, is the voltage the pad is configured
>> to operate at versus the voltage of the IO rail.
> 
> Linus suggested this dt property name to make more readable and generic
> and meaningful with other property :power-source.

OK.

Jon

  reply	other threads:[~2016-05-03 13:33 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-02 12:17 [PATCH 0/6] soc/tegra: Add support for IO pads control via pinctrl interface Laxman Dewangan
2016-05-02 12:17 ` [PATCH 2/6] soc/tegra: pmc: Correct type of variable for tegra_pmc_readl() Laxman Dewangan
2016-05-03 11:42   ` Jon Hunter
2016-05-02 12:17 ` [PATCH 3/6] soc/tegra: pmc: Add support for IO pads power state and voltage Laxman Dewangan
     [not found]   ` <1462191434-28933-4-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-03 12:34     ` Jon Hunter
     [not found]       ` <57289AC0.4090604-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-03 12:31         ` Laxman Dewangan
     [not found]           ` <57289A2B.7040501-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-03 12:55             ` Jon Hunter
2016-05-03 12:48               ` Laxman Dewangan
     [not found]                 ` <57289E35.8040400-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-03 13:12                   ` Jon Hunter
2016-05-03 13:07                     ` Laxman Dewangan
2016-05-02 12:17 ` [PATCH 5/6] pinctrl: tegra: Add DT binding for io pads control Laxman Dewangan
2016-05-03 12:44   ` Jon Hunter
2016-05-03 12:54     ` Laxman Dewangan
2016-05-03 13:33       ` Jon Hunter [this message]
2016-05-02 12:17 ` [PATCH 6/6] pinctrl: tegra: Add driver to configure voltage and power state of io pads Laxman Dewangan
     [not found]   ` <1462191434-28933-7-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-11  9:19     ` Linus Walleij
     [not found]       ` <CACRpkdbvCQr11hjCBoeOO+8-MLUbwXAjv9xW=jKR=Y9hZO5sjA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-05-11 16:07         ` Stephen Warren
2016-05-12 10:30           ` Jon Hunter
2016-05-12 19:02   ` Javier Martinez Canillas
2016-05-12 19:48   ` Jon Hunter
     [not found] ` <1462191434-28933-1-git-send-email-ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-05-02 12:17   ` [PATCH 1/6] soc/tegra: pmc: Use BIT macro for register field definition Laxman Dewangan
2016-05-02 12:17   ` [PATCH 4/6] soc/tegra: pmc: Register PMC child devices as platform device Laxman Dewangan
2016-05-03 12:36     ` Jon Hunter
2016-05-03 15:26     ` Jon Hunter
2016-05-03 11:38   ` [PATCH 0/6] soc/tegra: Add support for IO pads control via pinctrl interface Jon Hunter

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