Query about Open drain flag with active LOW

[Laxman Dewangan <ldewangan@nvidia.com>]

Hi Linus,
I need help to understand the open drain flag passing from the DT.
The DT binding header says: In the file include/dt-bindings/gpio/gpio.h

/*
* Open Drain/Collector is the combination of single-ended active low,
* Open Source/Emitter is the combination of single-ended active high.
*/
#define GPIO_OPEN_DRAIN (GPIO_SINGLE_ENDED | GPIO_ACTIVE_LOW)
#define GPIO_OPEN_SOURCE (GPIO_SINGLE_ENDED | GPIO_ACTIVE_HIGH)


I have the schematics, where I need to set it as
Pin state HIGH (by setting gpio-input mode) to enable the circuit.
Pin state LOW (by setting gpio-output mode with value to 0) to disable 
the circuit.


With this, I think the GPIO is active HIGH and open drain type.
If I set the active LOW from DT then I can not set pin to logical 1 
using the API gpiod_set_value() with “1”.
As this invert before calling _gpiod_set_raw_value() and so the value = 
0 and it set the pin in the gpio mode output-Low.

Shouldn'’t open drain pin are active HIGH?

Thanks,
Laxman

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