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AJvYcCVo68/hFYdP/UAbEvieSHqZ1eFomJoHHs+KkU15QOtuYNVebQVKcSehFencskeV7RNfJEv9RCxgr/vQ@vger.kernel.org X-Gm-Message-State: AOJu0Yx4oc62zzBNVsGyGwyIuQxd7nJZMtHyQV0FhREFnD6bS1pIT9nn HZFfGj3Aj1F1CEfTBoMAgQlpuIBlUEOA2buZYwNgtpmmWl84//2kuErxWX10U8w= X-Google-Smtp-Source: AGHT+IGCsBt4YImQ9v/cxMm8F2bd0t7nztI/dFwfKLybyOThX/4Zc2NTUaw9MVXNyjcZDUzvlEvVaQ== X-Received: by 2002:a17:907:1a4e:b0:a9a:2523:b4ce with SMTP id a640c23a62f3a-a9de5c91985mr2353019666b.6.1730906713378; Wed, 06 Nov 2024 07:25:13 -0800 (PST) Received: from [192.168.50.4] ([82.78.167.28]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9eb1814086sm294320366b.193.2024.11.06.07.25.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 06 Nov 2024 07:25:12 -0800 (PST) Message-ID: <5f524886-7479-44d7-b94f-21207c5a9ff9@tuxon.dev> Date: Wed, 6 Nov 2024 17:25:09 +0200 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 12/31] ASoC: sh: rz-ssi: Use a proper bitmask for clear bits Content-Language: en-US To: Geert Uytterhoeven Cc: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, support.opensource@diasemi.com, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de, Adam.Thomson.Opensource@diasemi.com, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, Claudiu Beznea References: <20241106081826.1211088-1-claudiu.beznea.uj@bp.renesas.com> <20241106081826.1211088-13-claudiu.beznea.uj@bp.renesas.com> <4e233ebe-b0e1-4b37-9063-bdbeb5980b13@tuxon.dev> From: Claudiu Beznea In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 06.11.2024 17:21, Geert Uytterhoeven wrote: > Hi Claudiu, > > On Wed, Nov 6, 2024 at 4:17 PM Claudiu Beznea wrote: >> On 06.11.2024 16:56, Geert Uytterhoeven wrote: >>> On Wed, Nov 6, 2024 at 9:19 AM Claudiu wrote: >>>> From: Claudiu Beznea >>>> >>>> While it is still correct to pass zero as the bit-clear mask it may be >>>> confusing. For this, use a proper bitmask for clear bits. >>>> >>>> Signed-off-by: Claudiu Beznea >>> >>> Thanks for your patch! >>> >>>> --- a/sound/soc/renesas/rz-ssi.c >>>> +++ b/sound/soc/renesas/rz-ssi.c >>>> @@ -331,7 +331,7 @@ static void rz_ssi_set_idle(struct rz_ssi_priv *ssi) >>>> dev_info(ssi->dev, "timeout waiting for SSI idle\n"); >>>> >>>> /* Hold FIFOs in reset */ >>>> - rz_ssi_reg_mask_setl(ssi, SSIFCR, 0, SSIFCR_FIFO_RST); >>>> + rz_ssi_reg_mask_setl(ssi, SSIFCR, SSIFCR_FIFO_RST, SSIFCR_FIFO_RST); >>> >>> But you're not clearing SSIFCR_FIFO_RST, you're setting it? >> >> The bits should be set to reset the FIFOs. >> >> By "Use a proper bitmask for clear bits" phrase in the patch title or >> description I was referring at the 3rd argument of the >> rz_ssi_reg_mask_setl() function, which has the following prototype: >> >> static void rz_ssi_reg_mask_setl(struct rz_ssi_priv *priv, uint reg, >> >> u32 bclr, u32 bset) >> >> >> Would you prefer to rephrase it in the next version? > > The idea behind such functions is to pass a bitmask representing the > bits to be cleared to "bclr", and a bitmask representing the bits > to be set to "bset". In this case, you do not want to clear any bits, > so the "bclr" parameter should be zero, and the original code is fine. OK, I'll will drop this patch. > > Gr{oetje,eeting}s, > > Geert >