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From: Maulik Shah <mkshah@codeaurora.org>
To: Doug Anderson <dianders@chromium.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>,
	Marc Zyngier <maz@kernel.org>, LinusW <linus.walleij@linaro.org>,
	Stephen Boyd <swboyd@chromium.org>,
	Evan Green <evgreen@chromium.org>,
	Matthias Kaehlcke <mka@chromium.org>,
	LKML <linux-kernel@vger.kernel.org>,
	linux-arm-msm <linux-arm-msm@vger.kernel.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	Andy Gross <agross@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Rajendra Nayak <rnayak@codeaurora.org>,
	Lina Iyer <ilina@codeaurora.org>,
	Srinivas Rao L <lsrao@codeaurora.org>
Subject: Re: [PATCH v3 2/5] pinctrl: qcom: Add msmgpio irqchip flags
Date: Tue, 14 Jul 2020 16:13:33 +0530	[thread overview]
Message-ID: <5f6c3eec-5c2c-d546-ac3c-65e7d25c9031@codeaurora.org> (raw)
In-Reply-To: <CAD=FV=WcKB0AbcYNymAbfvDac-8c3uGgOn3B1Q-U4d3ZrvGuag@mail.gmail.com>

Hi,

On 7/14/2020 3:47 AM, Doug Anderson wrote:
> Hi,
>
> On Mon, Jun 22, 2020 at 2:32 AM Maulik Shah <mkshah@codeaurora.org> wrote:
>> Add irqchip specific flags for msmgpio irqchip to mask non wakeirqs
>> during suspend and mask before setting irq type.
>>
>> Masking before changing type should make sure any spurious interrupt
>> is not detected during this operation.
>>
>> Fixes: e35a6ae0eb3a ("pinctrl/msm: Setup GPIO chip in hierarchy")
>> Acked-by: Linus Walleij <linus.walleij@linaro.org>
>> Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
>> ---
>>   drivers/pinctrl/qcom/pinctrl-msm.c | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
>> index 2419023..b909ffe 100644
>> --- a/drivers/pinctrl/qcom/pinctrl-msm.c
>> +++ b/drivers/pinctrl/qcom/pinctrl-msm.c
>> @@ -1143,6 +1143,8 @@ static int msm_gpio_init(struct msm_pinctrl *pctrl)
>>          pctrl->irq_chip.irq_release_resources = msm_gpio_irq_relres;
>>          pctrl->irq_chip.irq_set_affinity = msm_gpio_irq_set_affinity;
>>          pctrl->irq_chip.irq_set_vcpu_affinity = msm_gpio_irq_set_vcpu_affinity;
>> +       pctrl->irq_chip.flags = IRQCHIP_MASK_ON_SUSPEND
> I haven't tested it, but with my suggestion in patch #4 to use
> irq_suspend and irq_resume, I presume adding IRQCHIP_MASK_ON_SUSPEND
> is no longer needed?
it will still be needed, to let the non wakeup capable IRQ masked during 
suspend.
>
>
>> +                               | IRQCHIP_SET_TYPE_MASKED;
> IIUC adding "IRQCHIP_SET_TYPE_MASKED" is unrelated to the rest of this
> series, right?

Right, but since we are adding missing flags, i added it together.

Thanks,
Maulik

>
> -Doug

-- 
QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation


  reply	other threads:[~2020-07-14 10:43 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-22  9:31 [PATCH v3 0/5] irqchip: qcom: pdc: Introduce irq_set_wake call Maulik Shah
2020-06-22  9:31 ` [PATCH v3 1/5] pinctrl: qcom: Remove irq_disable callback from msmgpio irqchip Maulik Shah
2020-07-13 22:17   ` Doug Anderson
     [not found]     ` <723acb53-364a-9045-8dbd-fa2a270798a6@codeaurora.org>
2020-07-15  0:08       ` Doug Anderson
2020-06-22  9:31 ` [PATCH v3 2/5] pinctrl: qcom: Add msmgpio irqchip flags Maulik Shah
2020-07-13 22:17   ` Doug Anderson
2020-07-14 10:43     ` Maulik Shah [this message]
2020-06-22  9:31 ` [PATCH v3 3/5] pinctrl: qcom: Use return value from irq_set_wake call Maulik Shah
2020-07-13 22:17   ` Doug Anderson
2020-07-16 13:18   ` Linus Walleij
2020-07-16 21:51     ` Doug Anderson
2020-06-22  9:31 ` [PATCH v3 4/5] irqchip: qcom-pdc: Introduce " Maulik Shah
2020-07-13 22:16   ` Doug Anderson
2020-07-14 10:54     ` Maulik Shah
2020-06-22  9:31 ` [PATCH v3 5/5] irqchip: qcom-pdc: Reset all pdc interrupts during init Maulik Shah
2020-07-13 22:17   ` Doug Anderson
2020-07-14 11:01     ` Maulik Shah

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