* [PATCH 1/3] pinctrl: sh-pfc: r8a7779: Add SCIF_CLK support
2015-12-11 13:48 [PATCH 0/3] pinctrl: sh-pfc: r8a7779/r8a7790/r8a7794: Add SCIF_CLK support Geert Uytterhoeven
@ 2015-12-11 13:48 ` Geert Uytterhoeven
2015-12-15 8:36 ` Linus Walleij
2015-12-11 13:48 ` [PATCH 2/3] pinctrl: sh-pfc: r8a7790: " Geert Uytterhoeven
` (2 subsequent siblings)
3 siblings, 1 reply; 7+ messages in thread
From: Geert Uytterhoeven @ 2015-12-11 13:48 UTC (permalink / raw)
To: Laurent Pinchart, Linus Walleij; +Cc: linux-sh, linux-gpio, Geert Uytterhoeven
Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the Baud Rate Generator for External Clock (BRG) on
SCIF.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 41 ++++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
index afc5d80353c568fd..bd17eccb6a8901a8 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
@@ -2282,6 +2282,35 @@ static const unsigned int scif5_clk_d_pins[] = {
static const unsigned int scif5_clk_d_mux[] = {
SCK5_D_MARK,
};
+/* - SCIF Clock ------------------------------------------------------------- */
+static const unsigned int scif_clk_pins[] = {
+ /* SCIF_CLK */
+ RCAR_GP_PIN(4, 28),
+};
+static const unsigned int scif_clk_mux[] = {
+ SCIF_CLK_MARK,
+};
+static const unsigned int scif_clk_b_pins[] = {
+ /* SCIF_CLK */
+ RCAR_GP_PIN(4, 5),
+};
+static const unsigned int scif_clk_b_mux[] = {
+ SCIF_CLK_B_MARK,
+};
+static const unsigned int scif_clk_c_pins[] = {
+ /* SCIF_CLK */
+ RCAR_GP_PIN(4, 18),
+};
+static const unsigned int scif_clk_c_mux[] = {
+ SCIF_CLK_C_MARK,
+};
+static const unsigned int scif_clk_d_pins[] = {
+ /* SCIF_CLK */
+ RCAR_GP_PIN(2, 29),
+};
+static const unsigned int scif_clk_d_mux[] = {
+ SCIF_CLK_D_MARK,
+};
/* - SDHI0 ------------------------------------------------------------------ */
static const unsigned int sdhi0_data1_pins[] = {
/* D0 */
@@ -2693,6 +2722,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(scif5_clk_c),
SH_PFC_PIN_GROUP(scif5_data_d),
SH_PFC_PIN_GROUP(scif5_clk_d),
+ SH_PFC_PIN_GROUP(scif_clk),
+ SH_PFC_PIN_GROUP(scif_clk_b),
+ SH_PFC_PIN_GROUP(scif_clk_c),
+ SH_PFC_PIN_GROUP(scif_clk_d),
SH_PFC_PIN_GROUP(sdhi0_data1),
SH_PFC_PIN_GROUP(sdhi0_data4),
SH_PFC_PIN_GROUP(sdhi0_ctrl),
@@ -2902,6 +2935,13 @@ static const char * const scif5_groups[] = {
"scif5_clk_d",
};
+static const char * const scif_clk_groups[] = {
+ "scif_clk",
+ "scif_clk_b",
+ "scif_clk_c",
+ "scif_clk_d",
+};
+
static const char * const sdhi0_groups[] = {
"sdhi0_data1",
"sdhi0_data4",
@@ -2997,6 +3037,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(scif3),
SH_PFC_FUNCTION(scif4),
SH_PFC_FUNCTION(scif5),
+ SH_PFC_FUNCTION(scif_clk),
SH_PFC_FUNCTION(usb0),
SH_PFC_FUNCTION(usb1),
SH_PFC_FUNCTION(usb2),
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH 1/3] pinctrl: sh-pfc: r8a7779: Add SCIF_CLK support
2015-12-11 13:48 ` [PATCH 1/3] pinctrl: sh-pfc: r8a7779: " Geert Uytterhoeven
@ 2015-12-15 8:36 ` Linus Walleij
2015-12-15 17:24 ` Laurent Pinchart
0 siblings, 1 reply; 7+ messages in thread
From: Linus Walleij @ 2015-12-15 8:36 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Laurent Pinchart, linux-sh@vger.kernel.org,
linux-gpio@vger.kernel.org
On Fri, Dec 11, 2015 at 2:48 PM, Geert Uytterhoeven
<geert+renesas@glider.be> wrote:
> Add pins, groups, and a function for SCIF_CLK, which is the external
> clock source for the Baud Rate Generator for External Clock (BRG) on
> SCIF.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
All looks OK to me, Acked-by.
BTW: Geert, what do you say as listing yourself as comaintainer for SH-PFC
below Laurent in MAINTAINERS? I think it's about time.
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 1/3] pinctrl: sh-pfc: r8a7779: Add SCIF_CLK support
2015-12-15 8:36 ` Linus Walleij
@ 2015-12-15 17:24 ` Laurent Pinchart
0 siblings, 0 replies; 7+ messages in thread
From: Laurent Pinchart @ 2015-12-15 17:24 UTC (permalink / raw)
To: Linus Walleij
Cc: Geert Uytterhoeven, linux-sh@vger.kernel.org,
linux-gpio@vger.kernel.org
On Tuesday 15 December 2015 09:36:06 Linus Walleij wrote:
> On Fri, Dec 11, 2015 at 2:48 PM, Geert Uytterhoeven wrote:
> > Add pins, groups, and a function for SCIF_CLK, which is the external
> > clock source for the Baud Rate Generator for External Clock (BRG) on
> > SCIF.
> >
> > Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> All looks OK to me, Acked-by.
>
> BTW: Geert, what do you say as listing yourself as comaintainer for SH-PFC
> below Laurent in MAINTAINERS? I think it's about time.
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 2/3] pinctrl: sh-pfc: r8a7790: Add SCIF_CLK support
2015-12-11 13:48 [PATCH 0/3] pinctrl: sh-pfc: r8a7779/r8a7790/r8a7794: Add SCIF_CLK support Geert Uytterhoeven
2015-12-11 13:48 ` [PATCH 1/3] pinctrl: sh-pfc: r8a7779: " Geert Uytterhoeven
@ 2015-12-11 13:48 ` Geert Uytterhoeven
2015-12-11 13:48 ` [PATCH 3/3] pinctrl: sh-pfc: r8a7794: " Geert Uytterhoeven
2015-12-13 18:45 ` [PATCH 0/3] pinctrl: sh-pfc: r8a7779/r8a7790/r8a7794: " Laurent Pinchart
3 siblings, 0 replies; 7+ messages in thread
From: Geert Uytterhoeven @ 2015-12-11 13:48 UTC (permalink / raw)
To: Laurent Pinchart, Linus Walleij; +Cc: linux-sh, linux-gpio, Geert Uytterhoeven
Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the Baud Rate Generator for External Clock (BRG) on
(H)SCIF.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index d99a5bcd90d9c5d3..a8b629bc7a557b2f 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -3219,6 +3219,21 @@ static const unsigned int scifb2_data_c_pins[] = {
static const unsigned int scifb2_data_c_mux[] = {
SCIFB2_RXD_C_MARK, SCIFB2_TXD_C_MARK,
};
+/* - SCIF Clock ------------------------------------------------------------- */
+static const unsigned int scif_clk_pins[] = {
+ /* SCIF_CLK */
+ RCAR_GP_PIN(4, 26),
+};
+static const unsigned int scif_clk_mux[] = {
+ SCIF_CLK_MARK,
+};
+static const unsigned int scif_clk_b_pins[] = {
+ /* SCIF_CLK */
+ RCAR_GP_PIN(5, 4),
+};
+static const unsigned int scif_clk_b_mux[] = {
+ SCIF_CLK_B_MARK,
+};
/* - SDHI0 ------------------------------------------------------------------ */
static const unsigned int sdhi0_data1_pins[] = {
/* D0 */
@@ -4122,6 +4137,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(scifb2_clk_b),
SH_PFC_PIN_GROUP(scifb2_ctrl_b),
SH_PFC_PIN_GROUP(scifb2_data_c),
+ SH_PFC_PIN_GROUP(scif_clk),
+ SH_PFC_PIN_GROUP(scif_clk_b),
SH_PFC_PIN_GROUP(sdhi0_data1),
SH_PFC_PIN_GROUP(sdhi0_data4),
SH_PFC_PIN_GROUP(sdhi0_ctrl),
@@ -4538,6 +4555,11 @@ static const char * const scifb2_groups[] = {
"scifb2_data_c",
};
+static const char * const scif_clk_groups[] = {
+ "scif_clk",
+ "scif_clk_b",
+};
+
static const char * const sdhi0_groups[] = {
"sdhi0_data1",
"sdhi0_data4",
@@ -4712,6 +4734,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(scifb0),
SH_PFC_FUNCTION(scifb1),
SH_PFC_FUNCTION(scifb2),
+ SH_PFC_FUNCTION(scif_clk),
SH_PFC_FUNCTION(sdhi0),
SH_PFC_FUNCTION(sdhi1),
SH_PFC_FUNCTION(sdhi2),
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* [PATCH 3/3] pinctrl: sh-pfc: r8a7794: Add SCIF_CLK support
2015-12-11 13:48 [PATCH 0/3] pinctrl: sh-pfc: r8a7779/r8a7790/r8a7794: Add SCIF_CLK support Geert Uytterhoeven
2015-12-11 13:48 ` [PATCH 1/3] pinctrl: sh-pfc: r8a7779: " Geert Uytterhoeven
2015-12-11 13:48 ` [PATCH 2/3] pinctrl: sh-pfc: r8a7790: " Geert Uytterhoeven
@ 2015-12-11 13:48 ` Geert Uytterhoeven
2015-12-13 18:45 ` [PATCH 0/3] pinctrl: sh-pfc: r8a7779/r8a7790/r8a7794: " Laurent Pinchart
3 siblings, 0 replies; 7+ messages in thread
From: Geert Uytterhoeven @ 2015-12-11 13:48 UTC (permalink / raw)
To: Laurent Pinchart, Linus Walleij; +Cc: linux-sh, linux-gpio, Geert Uytterhoeven
Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the Baud Rate Generator for External Clock (BRG) on
(H)SCIF.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
index 10995fa6c3cb2ff9..3718c7846bfd5cd3 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
@@ -2625,6 +2625,21 @@ static const unsigned int scifb2_ctrl_pins[] = {
static const unsigned int scifb2_ctrl_mux[] = {
SCIFB2_RTS_N_MARK, SCIFB2_CTS_N_MARK,
};
+/* - SCIF Clock ------------------------------------------------------------- */
+static const unsigned int scif_clk_pins[] = {
+ /* SCIF_CLK */
+ RCAR_GP_PIN(1, 23),
+};
+static const unsigned int scif_clk_mux[] = {
+ SCIF_CLK_MARK,
+};
+static const unsigned int scif_clk_b_pins[] = {
+ /* SCIF_CLK */
+ RCAR_GP_PIN(3, 29),
+};
+static const unsigned int scif_clk_b_mux[] = {
+ SCIF_CLK_B_MARK,
+};
/* - SDHI0 ------------------------------------------------------------------ */
static const unsigned int sdhi0_data1_pins[] = {
/* D0 */
@@ -3052,6 +3067,8 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(scifb2_data),
SH_PFC_PIN_GROUP(scifb2_clk),
SH_PFC_PIN_GROUP(scifb2_ctrl),
+ SH_PFC_PIN_GROUP(scif_clk),
+ SH_PFC_PIN_GROUP(scif_clk_b),
SH_PFC_PIN_GROUP(sdhi0_data1),
SH_PFC_PIN_GROUP(sdhi0_data4),
SH_PFC_PIN_GROUP(sdhi0_ctrl),
@@ -3335,6 +3352,11 @@ static const char * const scifb2_groups[] = {
"scifb2_ctrl",
};
+static const char * const scif_clk_groups[] = {
+ "scif_clk",
+ "scif_clk_b",
+};
+
static const char * const sdhi0_groups[] = {
"sdhi0_data1",
"sdhi0_data4",
@@ -3422,6 +3444,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(scifb0),
SH_PFC_FUNCTION(scifb1),
SH_PFC_FUNCTION(scifb2),
+ SH_PFC_FUNCTION(scif_clk),
SH_PFC_FUNCTION(sdhi0),
SH_PFC_FUNCTION(sdhi1),
SH_PFC_FUNCTION(sdhi2),
--
1.9.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH 0/3] pinctrl: sh-pfc: r8a7779/r8a7790/r8a7794: Add SCIF_CLK support
2015-12-11 13:48 [PATCH 0/3] pinctrl: sh-pfc: r8a7779/r8a7790/r8a7794: Add SCIF_CLK support Geert Uytterhoeven
` (2 preceding siblings ...)
2015-12-11 13:48 ` [PATCH 3/3] pinctrl: sh-pfc: r8a7794: " Geert Uytterhoeven
@ 2015-12-13 18:45 ` Laurent Pinchart
3 siblings, 0 replies; 7+ messages in thread
From: Laurent Pinchart @ 2015-12-13 18:45 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: Linus Walleij, linux-sh, linux-gpio
Hi Geert,
Thank you for the patch.
On Friday 11 December 2015 14:48:55 Geert Uytterhoeven wrote:
> Hi Linus, Laurent,
>
> This patch series add pins, groups, and a function for SCIF_CLK on R-Car
> SoCs that don't have that support yet (H1, H2, and E2). SCIF_CLK is the
> external clock source for the Baud Rate Generator for External Clock
> (BRG) on (H)SCIF.
>
> Geert Uytterhoeven (3):
> pinctrl: sh-pfc: r8a7779: Add SCIF_CLK support
> pinctrl: sh-pfc: r8a7790: Add SCIF_CLK support
> pinctrl: sh-pfc: r8a7794: Add SCIF_CLK support
I haven't checked the pin assignments so I'll trust you on that. The function
and group names seem good to me, so, for the whole series,
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 41 +++++++++++++++++++++++++++++++++
> drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 23 ++++++++++++++++++++
> drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 23 ++++++++++++++++++++
> 3 files changed, 87 insertions(+)
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 7+ messages in thread