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([2600:8803:e7e4:1d00:9583:1e37:58ed:10ae]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-73a283dbf9asm1344501a34.12.2025.06.16.14.11.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 16 Jun 2025 14:11:29 -0700 (PDT) Message-ID: <656c43dd-c39d-4e35-a9d8-70383c0836a0@baylibre.com> Date: Mon, 16 Jun 2025 16:11:29 -0500 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 07/11] iio: adc: ad4170: Add clock provider support To: Marcelo Schmitt , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Cc: jic23@kernel.org, lars@metafoo.de, Michael.Hennerich@analog.com, nuno.sa@analog.com, andy@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linus.walleij@linaro.org, brgl@bgdev.pl, marcelo.schmitt1@gmail.com References: <5ac4b2d54f426d997cbb067530ab8e9af9bdcf16.1749582679.git.marcelo.schmitt@analog.com> Content-Language: en-US From: David Lechner In-Reply-To: <5ac4b2d54f426d997cbb067530ab8e9af9bdcf16.1749582679.git.marcelo.schmitt@analog.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 6/10/25 3:33 PM, Marcelo Schmitt wrote: > The AD4170 chip can use an externally supplied clock at the XTAL2 pin, or > an external crystal connected to the XTAL1 and XTAL2 pins. Alternatively, > the AD4170 can provide its 16 MHz internal clock at the XTAL2 pin. In > addition, the chip has a programmable clock divider that allows dividing > the external or internal clock frequency, however, control for that is not > provided in this patch. Extend the AD4170 driver so it effectively uses the > provided external clock, if any, or supplies its own clock as a clock > provider. > ... > +static int ad4170_clock_select(struct iio_dev *indio_dev) > +{ > + struct ad4170_state *st = iio_priv(indio_dev); > + struct device *dev = &st->spi->dev; > + struct clk *ext_clk; > + int ret; > + > + ext_clk = devm_clk_get_optional_enabled(dev, NULL); > + if (IS_ERR(ext_clk)) > + return dev_err_probe(dev, PTR_ERR(ext_clk), > + "Failed to get external clock\n"); > + > + if (!ext_clk) { > + /* Use internal clock reference */ > + st->mclk_hz = AD4170_INT_CLOCK_16MHZ; > + st->clock_ctrl |= FIELD_PREP(AD4170_CLOCK_CTRL_CLOCKSEL_MSK, > + AD4170_CLOCK_CTRL_CLOCKSEL_INT_OUT); > + > + if (!device_property_read_bool(&st->spi->dev, "#clock-cells")) This isn't a flag, so device_property_present() is probably more correct. > + return 0; > + > + return ad4170_register_clk_provider(indio_dev); > + } > + > + /* Read optional clock-names prop to specify the external clock type */ > + ret = device_property_match_property_string(dev, "clock-names", > + ad4170_clk_sel, > + ARRAY_SIZE(ad4170_clk_sel)); > + > + ret = ret < 0 ? 0 : ret; /* Default to external clock if no clock-names */ > + st->clock_ctrl |= FIELD_PREP(AD4170_CLOCK_CTRL_CLOCKSEL_MSK, > + AD4170_CLOCK_CTRL_CLOCKSEL_EXT + ret); > + > + st->mclk_hz = clk_get_rate(ext_clk); > + if (st->mclk_hz < AD4170_EXT_CLOCK_MHZ_MIN || > + st->mclk_hz > AD4170_EXT_CLOCK_MHZ_MAX) { > + return dev_err_probe(dev, -EINVAL, > + "Invalid external clock frequency %u\n", > + st->mclk_hz); > + } > + > + return 0; > +}