From: claudiu beznea <claudiu.beznea@tuxon.dev>
To: Prabhakar <prabhakar.csengg@gmail.com>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Linus Walleij <linus.walleij@linaro.org>
Cc: linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org,
Biju Das <biju.das.jz@bp.renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH 2/4] pinctrl: renesas: rzg2l: Adjust bit masks for PIN_CFG_VARIABLE to use BIT(62)
Date: Mon, 24 Jun 2024 07:57:14 +0300 [thread overview]
Message-ID: <65dcadf2-9247-4c65-84fa-ef982bfe79b0@tuxon.dev> (raw)
In-Reply-To: <20240618174831.415583-3-prabhakar.mahadev-lad.rj@bp.renesas.com>
On 18.06.2024 20:48, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Shift the bit masks for `PIN_CFG_PIN_MAP_MASK` and `PIN_CFG_PIN_REG_MASK`,
> to accommodate `PIN_CFG_VARIABLE` using `BIT(62)`.
>
> Previously, these bit masks were placed higher up in the bit range, which
> did not leave room for `PIN_CFG_VARIABLE` at `BIT(62)`. By adjusting these
> masks, we ensure that `PIN_CFG_VARIABLE` can occupy `BIT(62)` without any
> conflicts. The updated masks are now:
> - `PIN_CFG_PIN_MAP_MASK`: `GENMASK_ULL(61, 54)` (was `GENMASK_ULL(62, 55)`)
> - `PIN_CFG_PIN_REG_MASK`: `GENMASK_ULL(53, 46)` (was `GENMASK_ULL(54, 47)`)
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> ---
> drivers/pinctrl/renesas/pinctrl-rzg2l.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> index bfaeeb00ac4a..b79dd1ea2616 100644
> --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> @@ -87,8 +87,8 @@
> PIN_CFG_FILNUM | \
> PIN_CFG_FILCLKSEL)
>
> -#define PIN_CFG_PIN_MAP_MASK GENMASK_ULL(62, 55)
> -#define PIN_CFG_PIN_REG_MASK GENMASK_ULL(54, 47)
> +#define PIN_CFG_PIN_MAP_MASK GENMASK_ULL(61, 54)
> +#define PIN_CFG_PIN_REG_MASK GENMASK_ULL(53, 46)
> #define PIN_CFG_MASK GENMASK_ULL(31, 0)
>
> /*
next prev parent reply other threads:[~2024-06-24 4:57 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-18 17:48 [PATCH 0/4] pinctrl: renesas: rzg2l: Macro Updates and Reorganization for Pin Configuration Prabhakar
2024-06-18 17:48 ` [PATCH 1/4] pinctrl: renesas: rzg2l: Update PIN_CFG_MASK() macro to be 32-bit wide Prabhakar
2024-06-21 12:14 ` Geert Uytterhoeven
2024-06-24 4:56 ` claudiu beznea
2024-06-18 17:48 ` [PATCH 2/4] pinctrl: renesas: rzg2l: Adjust bit masks for PIN_CFG_VARIABLE to use BIT(62) Prabhakar
2024-06-21 12:14 ` Geert Uytterhoeven
2024-06-24 4:57 ` claudiu beznea [this message]
2024-06-18 17:48 ` [PATCH 3/4] pinctrl: renesas: rzg2l: Move RZG2L_SINGLE_PIN definition to top of the file Prabhakar
2024-06-21 12:15 ` Geert Uytterhoeven
2024-06-24 4:57 ` claudiu beznea
2024-06-18 17:48 ` [PATCH 4/4] pinctrl: renesas: rzg2l: Reorganize variable configuration macro Prabhakar
2024-06-21 12:17 ` Geert Uytterhoeven
2024-06-21 12:34 ` Lad, Prabhakar
2024-06-24 4:57 ` claudiu beznea
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