From: Paul Menzel <pmenzel@molgen.mpg.de>
To: Billy Tsai <billy_tsai@aspeedtech.com>
Cc: andrew@codeconstruct.com.au, linus.walleij@linaro.org,
joel@jms.id.au, johnny_huang@aspeedtech.com,
linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org,
linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, BMC-SW@aspeedtech.com,
Ricky_CX_Wu@wiwynn.com
Subject: Re: [PATCH v2] pinctrl: pinctrl-aspeed-g6: Fix register offset for pinconf of GPIOR-T
Date: Wed, 13 Mar 2024 12:08:01 +0100 [thread overview]
Message-ID: <6f2af609-e3fc-426b-a7ee-b83b859af09f@molgen.mpg.de> (raw)
In-Reply-To: <20240313092809.2596644-1-billy_tsai@aspeedtech.com>
Dear Billy,
Thank you very much for sending version 2.
Am 13.03.24 um 10:28 schrieb Billy Tsai:
> The register offset to disable the internal pull-down of GPIOR~T is 0x630
> instead of 0x620, as specified in the Ast2600 datasheet v15
> The datasheet can download from the official Aspeed website.
(No need for another iteration for this, but “can be downloaded”.)
> Fixes: 15711ba6ff19 ("pinctrl: aspeed-g6: Add AST2600 pinconf support")
> Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com>
> ---
> drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c | 34 +++++++++++-----------
> 1 file changed, 17 insertions(+), 17 deletions(-)
[…]
Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Kind regards,
Paul
next prev parent reply other threads:[~2024-03-13 11:09 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-13 9:28 [PATCH v2] pinctrl: pinctrl-aspeed-g6: Fix register offset for pinconf of GPIOR-T Billy Tsai
2024-03-13 11:08 ` Paul Menzel [this message]
2024-03-13 22:53 ` Andrew Jeffery
2024-03-28 9:15 ` Linus Walleij
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