* [PATCH] pinctrl: renesas: pinctrl-rzg2l: Add validation of GPIO pin in rzg2l_gpio_request()
@ 2023-09-05 12:56 Prabhakar
2023-09-06 8:12 ` claudiu beznea
0 siblings, 1 reply; 3+ messages in thread
From: Prabhakar @ 2023-09-05 12:56 UTC (permalink / raw)
To: Geert Uytterhoeven, Linus Walleij, linux-renesas-soc
Cc: linux-gpio, linux-kernel, Prabhakar, Biju Das, Lad Prabhakar
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Validate the GPIO pin request in rzg2l_gpio_request() callback using
rzg2l_validate_gpio_pin() function. This stops any accidental usage
of GPIO pins which are not supported by the SoCs.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
drivers/pinctrl/renesas/pinctrl-rzg2l.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index 37cdfe4b04f9..4ad08a4b786a 100644
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -795,12 +795,18 @@ static const struct pinconf_ops rzg2l_pinctrl_confops = {
static int rzg2l_gpio_request(struct gpio_chip *chip, unsigned int offset)
{
struct rzg2l_pinctrl *pctrl = gpiochip_get_data(chip);
+ const struct pinctrl_pin_desc *pin = &pctrl->desc.pins[offset];
+ u64 *pin_data = pin->drv_data;
u32 port = RZG2L_PIN_ID_TO_PORT(offset);
u8 bit = RZG2L_PIN_ID_TO_PIN(offset);
unsigned long flags;
u8 reg8;
int ret;
+ ret = rzg2l_validate_gpio_pin(pctrl, *pin_data, port, bit);
+ if (ret)
+ return ret;
+
ret = pinctrl_gpio_request(chip->base + offset);
if (ret)
return ret;
--
2.34.1
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] pinctrl: renesas: pinctrl-rzg2l: Add validation of GPIO pin in rzg2l_gpio_request()
2023-09-05 12:56 [PATCH] pinctrl: renesas: pinctrl-rzg2l: Add validation of GPIO pin in rzg2l_gpio_request() Prabhakar
@ 2023-09-06 8:12 ` claudiu beznea
2023-09-06 11:56 ` Lad, Prabhakar
0 siblings, 1 reply; 3+ messages in thread
From: claudiu beznea @ 2023-09-06 8:12 UTC (permalink / raw)
To: Prabhakar, Geert Uytterhoeven, Linus Walleij, linux-renesas-soc
Cc: linux-gpio, linux-kernel, Biju Das, Lad Prabhakar
Hi, Prabhakar,
On 9/5/23 15:56, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Validate the GPIO pin request in rzg2l_gpio_request() callback using
> rzg2l_validate_gpio_pin() function. This stops any accidental usage
> of GPIO pins which are not supported by the SoCs.
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
> drivers/pinctrl/renesas/pinctrl-rzg2l.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> index 37cdfe4b04f9..4ad08a4b786a 100644
> --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> @@ -795,12 +795,18 @@ static const struct pinconf_ops rzg2l_pinctrl_confops = {
> static int rzg2l_gpio_request(struct gpio_chip *chip, unsigned int offset)
> {
> struct rzg2l_pinctrl *pctrl = gpiochip_get_data(chip);
> + const struct pinctrl_pin_desc *pin = &pctrl->desc.pins[offset];
> + u64 *pin_data = pin->drv_data;
Maybe move this down a bit to keep the reverse christmas tree order that
the driver is using as pattern.
Other than this:
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> u32 port = RZG2L_PIN_ID_TO_PORT(offset);
> u8 bit = RZG2L_PIN_ID_TO_PIN(offset);
> unsigned long flags;
> u8 reg8;
> int ret;
>
> + ret = rzg2l_validate_gpio_pin(pctrl, *pin_data, port, bit);
> + if (ret)
> + return ret;
> +
> ret = pinctrl_gpio_request(chip->base + offset);
> if (ret)
> return ret;
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] pinctrl: renesas: pinctrl-rzg2l: Add validation of GPIO pin in rzg2l_gpio_request()
2023-09-06 8:12 ` claudiu beznea
@ 2023-09-06 11:56 ` Lad, Prabhakar
0 siblings, 0 replies; 3+ messages in thread
From: Lad, Prabhakar @ 2023-09-06 11:56 UTC (permalink / raw)
To: claudiu beznea
Cc: Geert Uytterhoeven, Linus Walleij, linux-renesas-soc, linux-gpio,
linux-kernel, Biju Das, Lad Prabhakar
Hi Claudiu,
Thank you for the review.
On Wed, Sep 6, 2023 at 9:12 AM claudiu beznea <claudiu.beznea@tuxon.dev> wrote:
>
> Hi, Prabhakar,
>
> On 9/5/23 15:56, Prabhakar wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Validate the GPIO pin request in rzg2l_gpio_request() callback using
> > rzg2l_validate_gpio_pin() function. This stops any accidental usage
> > of GPIO pins which are not supported by the SoCs.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> > drivers/pinctrl/renesas/pinctrl-rzg2l.c | 6 ++++++
> > 1 file changed, 6 insertions(+)
> >
> > diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > index 37cdfe4b04f9..4ad08a4b786a 100644
> > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > @@ -795,12 +795,18 @@ static const struct pinconf_ops rzg2l_pinctrl_confops = {
> > static int rzg2l_gpio_request(struct gpio_chip *chip, unsigned int offset)
> > {
> > struct rzg2l_pinctrl *pctrl = gpiochip_get_data(chip);
> > + const struct pinctrl_pin_desc *pin = &pctrl->desc.pins[offset];
> > + u64 *pin_data = pin->drv_data;
>
> Maybe move this down a bit to keep the reverse christmas tree order that
> the driver is using as pattern.
>
Sure, will do and send a v2.
> Other than this:
> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
> Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>
Thanks for testing.
Cheers,
Prabhakar
^ permalink raw reply [flat|nested] 3+ messages in thread
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2023-09-05 12:56 [PATCH] pinctrl: renesas: pinctrl-rzg2l: Add validation of GPIO pin in rzg2l_gpio_request() Prabhakar
2023-09-06 8:12 ` claudiu beznea
2023-09-06 11:56 ` Lad, Prabhakar
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