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[2001:1c00:c1e:bf00:1db8:22d3:1bc9:8ca1]) by smtp.gmail.com with ESMTPSA id r17sm293609edw.70.2022.01.12.12.20.26 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 12 Jan 2022 12:20:26 -0800 (PST) Message-ID: <7cda97fe-4af3-694d-7e16-a523a205ad9f@redhat.com> Date: Wed, 12 Jan 2022 21:20:25 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.3.0 Subject: Re: [PATCH] pinctrl: baytrail: Clear direct_irq_en flag on broken configs Content-Language: en-US From: Hans de Goede To: Andy Shevchenko Cc: Mika Westerberg , Andy Shevchenko , Bartosz Golaszewski , Linus Walleij , "linux-gpio@vger.kernel.org" References: <20220107234456.148389-1-hdegoede@redhat.com> In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Hi, On 1/8/22 10:59, Hans de Goede wrote: > Hi, > > On 1/8/22 01:04, Andy Shevchenko wrote: >> >> >> On Saturday, January 8, 2022, Hans de Goede > wrote: >> >> Some boards set the direct_irq_en flag in the conf0 register without >> setting any of the trigger bits. The direct_irq_en flag just means that >> the GPIO will send IRQs directly to the APIC instead of going through >> the shared interrupt for the GPIO controller, in order for the pin to >> be able to actually generate IRQs the trigger flags must still be set. >> >> So having the direct_irq_en flag set without any trigger flags is >> non-sense, log a FW_BUG warning when encountering this and clear the flag >> so that a driver can actually use the pin as IRQ through gpiod_to_irq(). >> >> Specifically this allows the edt-ft5x06 touchscreen driver to use >> INT33FC:02 pin 3 as touchscreen IRQ on the Nextbook Ares 8 tablet, >> accompanied by the following new log message: >> >> byt_gpio INT33FC:02: [Firmware Bug]: pin 3: direct_irq_en set without trigger, clearing >> >> The new byt_direct_irq_sanity_check() function also checks that the >> pin is actually appointed to one of the 16 direct-IRQs which the GPIO >> controller supports and on success prints debug messages like these: >> >> byt_gpio INT33FC:02: Pin 0: uses direct IRQ 0 (APIC 67) >> byt_gpio INT33FC:02: Pin 15: uses direct IRQ 2 (APIC 69) >> >> >> Should be these updated? > > Yes the " (APIC 6x)" part is gone now. I will fix this for v4. > >> This is useful to figure out the GPIO pin belonging to ACPI >> resources like this one: "Interrupt () { 0x00000043 }" or >> the other way around. >> >> Suggested-by: Andy Shevchenko > >> Signed-off-by: Hans de Goede > >> --- >> Changes in v3: >> - Rework code to check if the pin is assigned one of the 16 direct IRQs >>   (new code suggested-by Andy) >> - Drop dev_dbg of the (likely?) APIC IRQ, only log the direct IRQ index >> >> >> Thinking about direct IRQ mappings I will look into the Datasheet next week. > > Ok, I will wait for you to get back to me then before posting a v4. Note I've found the direct IRQ to IO-APIC pin mappings now, they are described in: atom-e3800-family-datasheet.pdf, so I've re-added the APIC IRQ to the printed log msg for v4. Regards, Hans