From: Florian Fainelli <f.fainelli@gmail.com>
To: Andrew Lunn <andrew@lunn.ch>, justinpopo6@gmail.com
Cc: linux-gpio@vger.kernel.org, f.fainelli@gmail.com,
linus.walleij@linaro.org, linux-kernel@vger.kernel.org,
bcm-kernel-feedback-list@broadcom.com, gregory.0xf0@gmail.com,
computersforpeace@gmail.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2] gpio: brcmstb: allow 0 width GPIO banks
Date: Mon, 20 Aug 2018 14:08:09 -0700 [thread overview]
Message-ID: <8419b0dc-9998-3147-512f-85d2694c6a2e@gmail.com> (raw)
In-Reply-To: <20180818005211.GC26866@lunn.ch>
On 08/17/2018 05:52 PM, Andrew Lunn wrote:
> On Fri, Aug 17, 2018 at 04:47:39PM -0700, justinpopo6@gmail.com wrote:
>> From: Justin Chen <justinpopo6@gmail.com>
>>
>> Sometimes we have empty banks within the GPIO block. This commit allows
>> proper handling of 0 width GPIO banks.
>
> Hi Justin
>
> This is coming from DT? Why do you put 0 width banks in DT in the
> first place?
The way the binding is defined, the "reg" property must cover the entire
GPIO block. On our chips we typically have two blocks, one called GIO
and one called AON_GIO. One of our chips, BCM7429 unfortunately does not
have contiguous banks (groups of 32 GPIOs) within the GIO register
range, it has a first bank from 0 -> 0x20, then nothing, then another
one from 0x40 -> 0x60, which is why this change was proposed, since it
does not break any existing DT blob.
--
Florian
next prev parent reply other threads:[~2018-08-20 21:08 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-17 23:47 [PATCH v2] gpio: brcmstb: allow 0 width GPIO banks justinpopo6
2018-08-17 23:49 ` Florian Fainelli
2018-08-18 0:52 ` Andrew Lunn
2018-08-20 21:08 ` Florian Fainelli [this message]
2018-08-30 9:05 ` Linus Walleij
2018-08-31 21:26 ` Gregory Fong
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