[PATCH 00/47] arm64: qcom: dts: add QCS9100 support

[PATCH 00/47] arm64: qcom: dts: add QCS9100 support

[Tengfei Fan]

Introduce support for the QCS9100 SoC device tree (DTSI) and the
QCS9100 RIDE board DTS. The QCS9100 is a variant of the SA8775p.
While the QCS9100 platform is still in the early design stage, the
QCS9100 RIDE board is identical to the SA8775p RIDE board, except it
mounts the QCS9100 SoC instead of the SA8775p SoC.

The QCS9100 SoC DTSI was directly renamed from the SA8775p SoC DTSI. In
the upcoming weeks, Nikunj Kela will develop a new device tree related
to SA8775p, specifically supporting the SCMI resource firmware solution
for the SA8775p platform. If you're already familiar with the
background, feel free to skip part[2], which provides a detailed
explanation.

All compatible strings have been updated from “SA8775P” to “QCS9100.”
If you’re already aware of the context, feel free to skip part[3], which
provides a detailed explanation of various other options.

Here’s the reason and background: Bjorn Andersson, Nikunj Kela,
Srinivas Kandagatla, and other Qualcomm engineers contributed to the
current design, and we’ve finalized this series for broader audience
review.

*This patch series aligns with upstream efforts toward a new design
solution: “Using logical performance and power domains to achieve
resource abstraction over SCMI.” For more details, refer to [1]:
[1]https://resources.linaro.org/en/resource/wfnfEwBhRjLV1PEAJoDDte

*The SA8775p-RIDE will transition to using SCMI resources. This involves
migrating to SCMI power and performance protocols for requesting and
configuring peripheral resources such as clocks, regulators,
interconnects, and PHYs. Consequently, most devices in the SA8775p-RIDE
will require updates to drivers, bindings, and device trees.

*The QCS9100-RIDE project will continue using the existing resources.
It will rely on the current kernel infrastructure for clocks, regulators,
interconnects, PHYs, and APIs.

[2] The reason of qcs9100.dtsi renamed from sa8775.dtsi:
The proposal is to maintain two separate platform.dtsi files.
qcs9100.dtsi for non-scmi resources and sa8775p.dtsi for SCMI resources.
Currently, the upstream sa8775p.dtsi contains 176 nodes with specified
“compatible” strings. Among these, 142 nodes require distinct properties
for SCMI and non-SCMI. As the IoT target is being upstreamed, both node
counts are expected to increase for the IoT/QCS platform.

If we do not implement platform separation, any modifications to the
base sa8775p.dtsi-whether for automotive or IoT purposes-must consider
the other platform. Each node(e.g., remoteproc, multimedia) added should
be countered with an overlay that disables it in the automotive context.
Care must be taken to avoid introducing changes that inferfere with the
automotive system design, This structure poses challenges for human
reasioning, leading to issues during development, code review, and
maintenance.

Furthermore, we are addressing the complexity of resuing marketing names
accross both the IoT(QCS9100) and automotive(SA8775p) platforms. This
decision has significations throughout DeviceTree and the kernel.
Consequently, renameing the QCS9100 device tree files from the SA8775p
device files is our definitive choice.

[3] The reason of All Compatible Strings Changed from “SA8775P” to
“QCS9100”:
During discussions, three options were considered. Ultimately, Option
B was chosen as the best approach for separating QCS projects from SA
projects. This decision simplifies the reviewer’s task by focusing on
each platform independently. Developers only need to verify the
affected platform.

*Option A: “And” (qcs9100+sa8775):

Add all qcs9100-compatible strings alongside the current
sa8775p-compatible strings in each binding file. For example:
aggre1_noc: interconnect-aggre1-noc {
-    compatible = "qcom,sa8775p-aggre1-noc";
+    compatible = "qcom,qcs9100-aggre1-noc", "qcom,sa8775p-aggre1-noc";
    #interconnect-cells = <2>;
    qcom,bcm-voters = <&apps_bcm_voter>; };

Some device tree (DT) nodes may share common compatibles. For instance:
firmware {
    scm {
-        compatible = "qcom,scm-sa8775p", "qcom,scm";
+        compatible = "qcom,scm-qcs9100", "qcom,scm";
    };
};

Approximately 50+ sa8775p-related compatible names need to be changed
to qcs9100-compatible names in the binding files and DT nodes.
When the SCMI resource driver owner adds SCMI support, they need to
update both the qcs9100 DT (non-SCMI resource) and the sa8775 DT (SCMI
resource) simultaneously.
For this option:

DT and binding changes are needed.
No driver C file changes are required at this time.
Technical driver owners must handle both the qcs DT and sa DT.

*Option B: “Or” (qcs9100 or sa8775):

Replace all qcs9100-compatible strings with the current
sa8775p-compatible strings in the qcs9100 DT. For example:
aggre1_noc: interconnect-aggre1-noc {
-    compatible = "qcom,sa8775p-aggre1-noc";
+    compatible = "qcom,qcs9100-aggre1-noc";
    #interconnect-cells = <2>;
    qcom,bcm-voters = <&apps_bcm_voter>; };

Add the necessary “qcs9100” compatible strings to the C driver. In
drivers/interconnect/qcom/sa8775p.c:
static const struct of_device_id qnoc_of_match[] = {
    { .compatible = "qcom,sa8775p-aggre1-noc", .data = &sa8775p_aggre1_noc },
+   { .compatible = "qcom,qcs9100-aggre1-noc", .data =
&sa8775p_aggre1_noc },
    { .compatible = "qcom,sa8775p-aggre2-noc", .data = &sa8775p_aggre2_noc },
+   { .compatible = "qcom,qcs9100-aggre2-noc", .data =
&sa8775p_aggre2_noc },
    // ...
};

Some DT nodes may share common compatibles, similar to the example above.
Approximately 50+ sa8775p-related compatible names need to be changed to
qcs9100-compatible names in the binding files and DT nodes.
When the SCMI resource driver owner adds SCMI support, they only need to
update the sa8775 DT (SCMI resource).
For this option:
DT, binding, and C driver changes are needed.
Technical driver owners only need to handle the sa DT.

*Option C: “Depends” (sa8775 in qcs9100, depends on driver to change
necessary driver + DT later):
This option depends on the SCMI resource solution and requires minimal
driver changes.

Change common compatibles to “qcs9100,” as shown in the example:
firmware {
    scm {
-        compatible = "qcom,scm-sa8775p", "qcom,scm";
+        compatible = "qcom,scm-qcs9100", "qcom,scm";
    };
};

Approximately 30+ sa8775p-related compatible names need to be changed
to qcs9100-compatible names in the binding files and DT nodes.
When the SCMI resource driver owner adds SCMI support, they must
update both the qcs9100 DT and the sa8775 DT (SCMI resource)
simultaneously.
For example:

{ .compatible = "qcom,sa8775p-aggre1-noc", .data = &sa8775p_aggre1_noc },
+ { .compatible = "qcom,qcs9100-aggre1-noc", .data = &qcs9100_aggre1_noc
+ },
{ .compatible = "qcom,sa8775p-aggre2-noc", .data = &sa8775p_aggre2_noc },
+ { .compatible = "qcom,qcs9100-aggre2-noc", .data = &qcs9100_aggre2_noc
+ },
// ...

For this option:
DT changes are needed.
Technical driver owners are responsible for making the final different
driver changes and ensuring the exact binding of qcs9100 and sa8775
with different compatibles.

In summary, the current solution primarily targets SCMI-based resource
transactions. However, both the qcs project and the SA project, which
are in the development stage, require independent development processes.

Co-developed-by: Maria Yu <quic_aiquny@quicinc.com>
Signed-off-by: Maria Yu <quic_aiquny@quicinc.com>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---

Tengfei Fan (47):
  dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board
  arm64: dts: qcom: qcs9100: Introduce QCS9100 SoC dtsi
  arm64: dts: qcom: qcs9100: Introduce QCS9100 PMIC dtsi
  arm64: dts: qcom: qcs9100: Add QCS9100 RIDE board dts
  dt-bindings: firmware: qcom,scm: document SCM on QCS9100 SoC
  dt-bindings: interconnect: qcom: document the interconnect compatibles
    for QCS9100
  dt-bindings: clock: document QCS9100 GCC compatible
  dt-bindings: mailbox: qcom-ipcc: Document the QCS9100 IPCC
  dt-bindings: phy: Add QMP UFS PHY comptible for QCS9100
  dt-bindings: crypto: ice: Document QCS9100 inline crypto engine
  dt-bindings: crypto: qcom,prng: document QCS9100
  dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for QCS9100
  dt-bindings: ufs: qcom: document QCS9100 UFS
  dt-bindings: phy: qcom,qmp-usb: Add QCS9100 USB3 PHY
  dt-bindings: usb: dwc3: Add QCS9100 compatible
  dt-bindings: clock: qcom: describe the GPUCC clock for QCS9100
  dt-bindings: arm-smmu: Document QCS9100 GPU SMMU
  dt-bindings: phy: describe the Qualcomm SGMII PHY for QCS9100
  dt-bindings: cache: qcom,llcc: Add QCS9100 description
  dt-bindings: interrupt-controller: qcom,pdc: document pdc on QCS9100
  dt-bindings: thermal: qcom-tsens: document the QCS9100 Temperature
    Sensor
  dt-bindings: soc: qcom,aoss-qmp: Document the QCS9100 AOSS channel
  dt-bindings: pinctrl: add qcs9100-tlmm compatible
  dt-bindings: soc: qcom: add qcom,qcs9100-imem compatible
  dt-bindings: watchdog: qcom-wdt: document QCS9100
  dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for QCS9100
  dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCS9100 compatibles
  dt-bindings: power: qcom,rpmpd: document the QCS9100 RPMh Power
    Domains
  dt-bindings: net: qcom,ethqos: add description for qcs9100
  dt-bindings: PCI: Document compatible for QCS9100
  dt-bindings: PCI: qcom-ep: Add support for QCS9100 SoC
  dt-bindings: phy: qcom,qmp: Add qcs9100 QMP PCIe PHY
  interconnect: qcom: add driver support for qcs9100
  clk: qcom: add the GCC driver support for QCS9100
  phy: qcom-qmp-ufs: Add QCS9100 support
  phy: qcpm-qmp-usb: Add support for QCS9100
  clk: qcom: add the GPUCC driver support for QCS9100
  phy: qcom: add the SGMII SerDes PHY driver support
  soc: qcom: llcc: Add llcc configuration support for the QCS9100
    platform
  pinctrl: qcom: add the tlmm driver support for qcs9100 platform
  clk: qcom: rpmh: Add support for QCS9100 rpmh clocks
  soc: qcom: rmphpd: add power domains for QCS9100
  net: stmmac: dwmac-qcom-ethqos: add support for emac4 on qcs9100
    platforms
  PCI: qcom: Add support for QCS9100 SoC
  PCI: qcom-ep: Add HDMA support for QCS9100 SoC
  cpufreq: qcom-nvmem: add support for QCS9100
  phy: qcom-qmp-pcie: add x4 lane EP support for QCS9100

 .../devicetree/bindings/arm/qcom.yaml         |   3 +
 .../devicetree/bindings/cache/qcom,llcc.yaml  |   2 +
 .../devicetree/bindings/clock/qcom,gpucc.yaml |   1 +
 .../bindings/clock/qcom,rpmhcc.yaml           |   1 +
 .../bindings/clock/qcom,sa8775p-gcc.yaml      |   5 +-
 .../bindings/cpufreq/cpufreq-qcom-hw.yaml     |   1 +
 .../crypto/qcom,inline-crypto-engine.yaml     |   1 +
 .../devicetree/bindings/crypto/qcom,prng.yaml |   1 +
 .../bindings/firmware/qcom,scm.yaml           |   1 +
 .../interconnect/qcom,sa8775p-rpmh.yaml       |  14 +++
 .../interrupt-controller/qcom,pdc.yaml        |   1 +
 .../devicetree/bindings/iommu/arm,smmu.yaml   |   3 +
 .../bindings/mailbox/qcom-ipcc.yaml           |   1 +
 .../devicetree/bindings/net/qcom,ethqos.yaml  |   1 +
 .../devicetree/bindings/net/snps,dwmac.yaml   |   3 +
 .../devicetree/bindings/pci/qcom,pcie-ep.yaml |   2 +
 .../bindings/pci/qcom,pcie-sa8775p.yaml       |   5 +-
 .../phy/qcom,sa8775p-dwmac-sgmii-phy.yaml     |   5 +-
 .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml       |   4 +
 .../phy/qcom,sc8280xp-qmp-ufs-phy.yaml        |   2 +
 .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml   |   3 +
 .../bindings/phy/qcom,usb-snps-femto-v2.yaml  |   1 +
 .../bindings/pinctrl/qcom,sa8775p-tlmm.yaml   |   5 +-
 .../devicetree/bindings/power/qcom,rpmpd.yaml |   1 +
 .../bindings/soc/qcom/qcom,aoss-qmp.yaml      |   1 +
 .../devicetree/bindings/sram/qcom,imem.yaml   |   1 +
 .../bindings/thermal/qcom-tsens.yaml          |   1 +
 .../devicetree/bindings/ufs/qcom,ufs.yaml     |   2 +
 .../devicetree/bindings/usb/qcom,dwc3.yaml    |   3 +
 .../bindings/watchdog/qcom-wdt.yaml           |   1 +
 arch/arm64/boot/dts/qcom/Makefile             |   2 +-
 ...{sa8775p-pmics.dtsi => qcs9100-pmics.dtsi} |   0
 .../{sa8775p-ride.dts => qcs9100-ride.dts}    |   8 +-
 .../dts/qcom/{sa8775p.dtsi => qcs9100.dtsi}   | 112 +++++++++---------
 drivers/clk/qcom/clk-rpmh.c                   |   1 +
 drivers/clk/qcom/gcc-sa8775p.c                |   1 +
 drivers/clk/qcom/gpucc-sa8775p.c              |   1 +
 drivers/cpufreq/cpufreq-dt-platdev.c          |   1 +
 drivers/interconnect/qcom/sa8775p.c           |  14 +++
 .../stmicro/stmmac/dwmac-qcom-ethqos.c        |   1 +
 drivers/pci/controller/dwc/pcie-qcom-ep.c     |   1 +
 drivers/pci/controller/dwc/pcie-qcom.c        |   1 +
 drivers/phy/qualcomm/phy-qcom-qmp-pcie.c      |   6 +
 drivers/phy/qualcomm/phy-qcom-qmp-ufs.c       |   3 +
 drivers/phy/qualcomm/phy-qcom-qmp-usb.c       |   3 +
 drivers/phy/qualcomm/phy-qcom-sgmii-eth.c     |   1 +
 drivers/pinctrl/qcom/pinctrl-sa8775p.c        |   1 +
 drivers/pmdomain/qcom/rpmhpd.c                |   1 +
 drivers/soc/qcom/llcc-qcom.c                  |   1 +
 49 files changed, 170 insertions(+), 65 deletions(-)
 rename arch/arm64/boot/dts/qcom/{sa8775p-pmics.dtsi => qcs9100-pmics.dtsi} (100%)
 rename arch/arm64/boot/dts/qcom/{sa8775p-ride.dts => qcs9100-ride.dts} (99%)
 rename arch/arm64/boot/dts/qcom/{sa8775p.dtsi => qcs9100.dtsi} (97%)


base-commit: 82e4255305c554b0bb18b7ccf2db86041b4c8b6e
-- 
2.25.1

[PATCH 01/47] dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board

[Tengfei Fan]

Document the QCS9100 SoC and RIDE board.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/arm/qcom.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index ec1c10a12470..f06543f96026 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -45,6 +45,7 @@ description: |
         qcs8550
         qcm2290
         qcm6490
+        qcs9100
         qdu1000
         qrb2210
         qrb4210
@@ -894,7 +895,9 @@ properties:
 
       - items:
           - enum:
+              - qcom,qcs9100-ride
               - qcom,sa8775p-ride
+          - const: qcom,qcs9100
           - const: qcom,sa8775p
 
       - items:
-- 
2.25.1

[PATCH 02/47] arm64: dts: qcom: qcs9100: Introduce QCS9100 SoC dtsi

[Tengfei Fan]

Introduce QCS9100 SoC dtsi, QCS9100 is mainly used in IoT products.
QCS9100 is drived from SA8775p.
The current QCS9100 SoC dtsi is directly renamed from the SA8775p SoC
dtsi.
The QCS9100 platform is currently in the early design stage. Currently,
Both the QCS9100 platform and SA8775p platform use non-SCMI resources,
In the future, the SA8775p platform will transition to using SCMI
resources and it will have new sa8775p-related device tree.
This QCS9100 SoC dtsi remains consistent with the current SA8775p SoC
dtsi, except for updating the following sa8775p-related compatible names
to the qcs9100-related compatible name:
  - qcom,sa8775p-clk-virt
  - qcom,sa8775p-mc-virt
  - qcom,sa8775p-adsp-pas
  - qcom,sa8775p-cdsp-pas
  - qcom,sa8775p-cdsp1-pas
  - qcom,sa8775p-gpdsp0-pas
  - qcom,sa8775p-gpdsp1-pas
  - qcom,sa8775p-gcc
  - qcom,sa8775p-ipcc
  - qcom,sa8775p-config-noc
  - qcom,sa8775p-system-noc
  - qcom,sa8775p-aggre1-noc
  - qcom,sa8775p-aggre2-noc
  - qcom,sa8775p-pcie-anoc
  - qcom,sa8775p-gpdsp-anoc
  - qcom,sa8775p-mmss-noc
  - qcom,sa8775p-trng
  - qcom,sa8775p-ufshc
  - qcom,sa8775p-qmp-ufs-phy
  - qcom,sa8775p-qce
  - qcom,sa8775p-lpass-ag-noc
  - qcom,sa8775p-usb-hs-phy
  - qcom,sa8775p-dc-noc
  - qcom,sa8775p-gem-noc
  - qcom,sa8775p-dwc3
  - qcom,sa8775p-qmp-usb3-uni-phy
  - qcom,sa8775p-gpucc
  - qcom,sa8775p-smmu-500
  - qcom,sa8775p-dwmac-sgmii-phy
  - qcom,sa8775p-llcc-bwmon
  - qcom,sa8775p-cpu-bwmon
  - qcom,sa8775p-llcc
  - qcom,sa8775p-videocc
  - qcom,sa8775p-camcc
  - qcom,sa8775p-dispcc0
  - qcom,sa8775p-pdc
  - qcom,sa8775p-aoss-qmp
  - qcom,sa8775p-tlmm
  - qcom,sa8775p-imem
  - qcom,sa8775p-smmu-500
  - qcom,sa8775p-rpmh-clk
  - qcom,sa8775p-rpmhpd
  - qcom,sa8775p-cpufreq-epss
  - qcom,sa8775p-dispcc1
  - qcom,sa8775p-ethqos
  - qcom,sa8775p-nspa-noc
  - qcom,sa8775p-nspb-noc
  - qcom,sa8775p-qmp-gen4x2-pcie-phy
  - qcom,sa8775p-qmp-gen4x4-pcie-phy

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../dts/qcom/{sa8775p.dtsi => qcs9100.dtsi}   | 112 +++++++++---------
 1 file changed, 56 insertions(+), 56 deletions(-)
 rename arch/arm64/boot/dts/qcom/{sa8775p.dtsi => qcs9100.dtsi} (97%)

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/qcs9100.dtsi
similarity index 97%
rename from arch/arm64/boot/dts/qcom/sa8775p.dtsi
rename to arch/arm64/boot/dts/qcom/qcs9100.dtsi
index 23f1b2e5e624..1c257287af0c 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs9100.dtsi
@@ -220,91 +220,91 @@ eud_in: endpoint {
 
 	firmware {
 		scm {
-			compatible = "qcom,scm-sa8775p", "qcom,scm";
+			compatible = "qcom,scm-qcs9100", "qcom,scm";
 			memory-region = <&tz_ffi_mem>;
 		};
 	};
 
 	aggre1_noc: interconnect-aggre1-noc {
-		compatible = "qcom,sa8775p-aggre1-noc";
+		compatible = "qcom,qcs9100-aggre1-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	aggre2_noc: interconnect-aggre2-noc {
-		compatible = "qcom,sa8775p-aggre2-noc";
+		compatible = "qcom,qcs9100-aggre2-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	clk_virt: interconnect-clk-virt {
-		compatible = "qcom,sa8775p-clk-virt";
+		compatible = "qcom,qcs9100-clk-virt";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	config_noc: interconnect-config-noc {
-		compatible = "qcom,sa8775p-config-noc";
+		compatible = "qcom,qcs9100-config-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	dc_noc: interconnect-dc-noc {
-		compatible = "qcom,sa8775p-dc-noc";
+		compatible = "qcom,qcs9100-dc-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	gem_noc: interconnect-gem-noc {
-		compatible = "qcom,sa8775p-gem-noc";
+		compatible = "qcom,qcs9100-gem-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	gpdsp_anoc: interconnect-gpdsp-anoc {
-		compatible = "qcom,sa8775p-gpdsp-anoc";
+		compatible = "qcom,qcs9100-gpdsp-anoc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	lpass_ag_noc: interconnect-lpass-ag-noc {
-		compatible = "qcom,sa8775p-lpass-ag-noc";
+		compatible = "qcom,qcs9100-lpass-ag-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	mc_virt: interconnect-mc-virt {
-		compatible = "qcom,sa8775p-mc-virt";
+		compatible = "qcom,qcs9100-mc-virt";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	mmss_noc: interconnect-mmss-noc {
-		compatible = "qcom,sa8775p-mmss-noc";
+		compatible = "qcom,qcs9100-mmss-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	nspa_noc: interconnect-nspa-noc {
-		compatible = "qcom,sa8775p-nspa-noc";
+		compatible = "qcom,qcs9100-nspa-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	nspb_noc: interconnect-nspb-noc {
-		compatible = "qcom,sa8775p-nspb-noc";
+		compatible = "qcom,qcs9100-nspb-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	pcie_anoc: interconnect-pcie-anoc {
-		compatible = "qcom,sa8775p-pcie-anoc";
+		compatible = "qcom,qcs9100-pcie-anoc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	system_noc: interconnect-system-noc {
-		compatible = "qcom,sa8775p-system-noc";
+		compatible = "qcom,qcs9100-system-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
@@ -571,7 +571,7 @@ soc: soc@0 {
 		ranges = <0 0 0 0 0x10 0>;
 
 		gcc: clock-controller@100000 {
-			compatible = "qcom,sa8775p-gcc";
+			compatible = "qcom,qcs9100-gcc";
 			reg = <0x0 0x00100000 0x0 0xc7018>;
 			#clock-cells = <1>;
 			#reset-cells = <1>;
@@ -595,7 +595,7 @@ gcc: clock-controller@100000 {
 		};
 
 		ipcc: mailbox@408000 {
-			compatible = "qcom,sa8775p-ipcc", "qcom,ipcc";
+			compatible = "qcom,qcs9100-ipcc", "qcom,ipcc";
 			reg = <0x0 0x00408000 0x0 0x1000>;
 			interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-controller;
@@ -1593,12 +1593,12 @@ &config_noc SLAVE_QUP_3 QCOM_ICC_TAG_ALWAYS>,
 		};
 
 		rng: rng@10d2000 {
-			compatible = "qcom,sa8775p-trng", "qcom,trng";
+			compatible = "qcom,qcs9100-trng", "qcom,trng";
 			reg = <0 0x010d2000 0 0x1000>;
 		};
 
 		ufs_mem_hc: ufs@1d84000 {
-			compatible = "qcom,sa8775p-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
+			compatible = "qcom,qcs9100-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
 			reg = <0x0 0x01d84000 0x0 0x3000>;
 			interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
 			phys = <&ufs_mem_phy>;
@@ -1640,7 +1640,7 @@ ufs_mem_hc: ufs@1d84000 {
 		};
 
 		ufs_mem_phy: phy@1d87000 {
-			compatible = "qcom,sa8775p-qmp-ufs-phy";
+			compatible = "qcom,qcs9100-qmp-ufs-phy";
 			reg = <0x0 0x01d87000 0x0 0xe10>;
 			/*
 			 * Yes, GCC_EDP_REF_CLKREF_EN is correct in qref. It
@@ -1658,7 +1658,7 @@ ufs_mem_phy: phy@1d87000 {
 		};
 
 		ice: crypto@1d88000 {
-			compatible = "qcom,sa8775p-inline-crypto-engine",
+			compatible = "qcom,qcs9100-inline-crypto-engine",
 				     "qcom,inline-crypto-engine";
 			reg = <0x0 0x01d88000 0x0 0x8000>;
 			clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
@@ -2578,7 +2578,7 @@ apss_tpdm2_out: endpoint {
 		};
 
 		usb_0_hsphy: phy@88e4000 {
-			compatible = "qcom,sa8775p-usb-hs-phy",
+			compatible = "qcom,qcs9100-usb-hs-phy",
 				     "qcom,usb-snps-hs-5nm-phy";
 			reg = <0 0x088e4000 0 0x120>;
 			clocks = <&rpmhcc RPMH_CXO_CLK>;
@@ -2591,7 +2591,7 @@ usb_0_hsphy: phy@88e4000 {
 		};
 
 		usb_0_qmpphy: phy@88e8000 {
-			compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
+			compatible = "qcom,qcs9100-qmp-usb3-uni-phy";
 			reg = <0 0x088e8000 0 0x2000>;
 
 			clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
@@ -2615,7 +2615,7 @@ usb_0_qmpphy: phy@88e8000 {
 		};
 
 		usb_0: usb@a6f8800 {
-			compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
+			compatible = "qcom,qcs9100-dwc3", "qcom,dwc3";
 			reg = <0 0x0a6f8800 0 0x400>;
 			#address-cells = <2>;
 			#size-cells = <2>;
@@ -2667,7 +2667,7 @@ usb_0_dwc3: usb@a600000 {
 		};
 
 		usb_1_hsphy: phy@88e6000 {
-			compatible = "qcom,sa8775p-usb-hs-phy",
+			compatible = "qcom,qcs9100-usb-hs-phy",
 				     "qcom,usb-snps-hs-5nm-phy";
 			reg = <0 0x088e6000 0 0x120>;
 			clocks = <&gcc GCC_USB_CLKREF_EN>;
@@ -2680,7 +2680,7 @@ usb_1_hsphy: phy@88e6000 {
 		};
 
 		usb_1_qmpphy: phy@88ea000 {
-			compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
+			compatible = "qcom,qcs9100-qmp-usb3-uni-phy";
 			reg = <0 0x088ea000 0 0x2000>;
 
 			clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
@@ -2704,7 +2704,7 @@ usb_1_qmpphy: phy@88ea000 {
 		};
 
 		usb_1: usb@a8f8800 {
-			compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
+			compatible = "qcom,qcs9100-dwc3", "qcom,dwc3";
 			reg = <0 0x0a8f8800 0 0x400>;
 			#address-cells = <2>;
 			#size-cells = <2>;
@@ -2756,7 +2756,7 @@ usb_1_dwc3: usb@a800000 {
 		};
 
 		usb_2_hsphy: phy@88e7000 {
-			compatible = "qcom,sa8775p-usb-hs-phy",
+			compatible = "qcom,qcs9100-usb-hs-phy",
 				     "qcom,usb-snps-hs-5nm-phy";
 			reg = <0 0x088e7000 0 0x120>;
 			clocks = <&gcc GCC_USB_CLKREF_EN>;
@@ -2769,7 +2769,7 @@ usb_2_hsphy: phy@88e7000 {
 		};
 
 		usb_2: usb@a4f8800 {
-			compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
+			compatible = "qcom,qcs9100-dwc3", "qcom,dwc3";
 			reg = <0 0x0a4f8800 0 0x400>;
 			#address-cells = <2>;
 			#size-cells = <2>;
@@ -2825,7 +2825,7 @@ tcsr_mutex: hwlock@1f40000 {
 		};
 
 		gpucc: clock-controller@3d90000 {
-			compatible = "qcom,sa8775p-gpucc";
+			compatible = "qcom,qcs9100-gpucc";
 			reg = <0x0 0x03d90000 0x0 0xa000>;
 			clocks = <&rpmhcc RPMH_CXO_CLK>,
 				 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
@@ -2839,7 +2839,7 @@ gpucc: clock-controller@3d90000 {
 		};
 
 		adreno_smmu: iommu@3da0000 {
-			compatible = "qcom,sa8775p-smmu-500", "qcom,adreno-smmu",
+			compatible = "qcom,qcs9100-smmu-500", "qcom,adreno-smmu",
 				     "qcom,smmu-500", "arm,mmu-500";
 			reg = <0x0 0x03da0000 0x0 0x20000>;
 			#iommu-cells = <2>;
@@ -2875,7 +2875,7 @@ adreno_smmu: iommu@3da0000 {
 		};
 
 		serdes0: phy@8901000 {
-			compatible = "qcom,sa8775p-dwmac-sgmii-phy";
+			compatible = "qcom,qcs9100-dwmac-sgmii-phy";
 			reg = <0x0 0x08901000 0x0 0xe10>;
 			clocks = <&gcc GCC_SGMI_CLKREF_EN>;
 			clock-names = "sgmi_ref";
@@ -2884,7 +2884,7 @@ serdes0: phy@8901000 {
 		};
 
 		serdes1: phy@8902000 {
-			compatible = "qcom,sa8775p-dwmac-sgmii-phy";
+			compatible = "qcom,qcs9100-dwmac-sgmii-phy";
 			reg = <0x0 0x08902000 0x0 0xe10>;
 			clocks = <&gcc GCC_SGMI_CLKREF_EN>;
 			clock-names = "sgmi_ref";
@@ -2893,7 +2893,7 @@ serdes1: phy@8902000 {
 		};
 
 		llcc: system-cache-controller@9200000 {
-			compatible = "qcom,sa8775p-llcc";
+			compatible = "qcom,qcs9100-llcc";
 			reg = <0x0 0x09200000 0x0 0x80000>,
 			      <0x0 0x09300000 0x0 0x80000>,
 			      <0x0 0x09400000 0x0 0x80000>,
@@ -2912,7 +2912,7 @@ llcc: system-cache-controller@9200000 {
 		};
 
 		pdc: interrupt-controller@b220000 {
-			compatible = "qcom,sa8775p-pdc", "qcom,pdc";
+			compatible = "qcom,qcs9100-pdc", "qcom,pdc";
 			reg = <0x0 0x0b220000 0x0 0x30000>,
 			      <0x0 0x17c000f0 0x0 0x64>;
 			qcom,pdc-ranges = <0 480 40>,
@@ -2959,7 +2959,7 @@ pdc: interrupt-controller@b220000 {
 		};
 
 		tsens2: thermal-sensor@c251000 {
-			compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
+			compatible = "qcom,qcs9100-tsens", "qcom,tsens-v2";
 			reg = <0x0 0x0c251000 0x0 0x1ff>,
 			      <0x0 0x0c224000 0x0 0x8>;
 			interrupts = <GIC_SPI 572 IRQ_TYPE_LEVEL_HIGH>,
@@ -2970,7 +2970,7 @@ tsens2: thermal-sensor@c251000 {
 		};
 
 		tsens3: thermal-sensor@c252000 {
-			compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
+			compatible = "qcom,qcs9100-tsens", "qcom,tsens-v2";
 			reg = <0x0 0x0c252000 0x0 0x1ff>,
 			      <0x0 0x0c225000 0x0 0x8>;
 			interrupts = <GIC_SPI 573 IRQ_TYPE_LEVEL_HIGH>,
@@ -2981,7 +2981,7 @@ tsens3: thermal-sensor@c252000 {
 		};
 
 		tsens0: thermal-sensor@c263000 {
-			compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
+			compatible = "qcom,qcs9100-tsens", "qcom,tsens-v2";
 			reg = <0x0 0x0c263000 0x0 0x1ff>,
 			      <0x0 0x0c222000 0x0 0x8>;
 			interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
@@ -2992,7 +2992,7 @@ tsens0: thermal-sensor@c263000 {
 		};
 
 		tsens1: thermal-sensor@c265000 {
-			compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
+			compatible = "qcom,qcs9100-tsens", "qcom,tsens-v2";
 			reg = <0x0 0x0c265000 0x0 0x1ff>,
 			      <0x0 0x0c223000 0x0 0x8>;
 			interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>,
@@ -3003,7 +3003,7 @@ tsens1: thermal-sensor@c265000 {
 		};
 
 		aoss_qmp: power-management@c300000 {
-			compatible = "qcom,sa8775p-aoss-qmp", "qcom,aoss-qmp";
+			compatible = "qcom,qcs9100-aoss-qmp", "qcom,aoss-qmp";
 			reg = <0x0 0x0c300000 0x0 0x400>;
 			interrupts-extended = <&ipcc IPCC_CLIENT_AOP
 					       IPCC_MPROC_SIGNAL_GLINK_QMP
@@ -3040,7 +3040,7 @@ spmi_bus: spmi@c440000 {
 		};
 
 		tlmm: pinctrl@f000000 {
-			compatible = "qcom,sa8775p-tlmm";
+			compatible = "qcom,qcs9100-tlmm";
 			reg = <0x0 0x0f000000 0x0 0x1000000>;
 			interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
 			gpio-controller;
@@ -3052,7 +3052,7 @@ tlmm: pinctrl@f000000 {
 		};
 
 		sram: sram@146d8000 {
-			compatible = "qcom,sa8775p-imem", "syscon", "simple-mfd";
+			compatible = "qcom,qcs9100-imem", "syscon", "simple-mfd";
 			reg = <0x0 0x146d8000 0x0 0x1000>;
 			ranges = <0x0 0x0 0x146d8000 0x1000>;
 
@@ -3066,7 +3066,7 @@ pil-reloc@94c {
 		};
 
 		apps_smmu: iommu@15000000 {
-			compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500";
+			compatible = "qcom,qcs9100-smmu-500", "qcom,smmu-500", "arm,mmu-500";
 			reg = <0x0 0x15000000 0x0 0x100000>;
 			#iommu-cells = <2>;
 			#global-interrupts = <2>;
@@ -3204,7 +3204,7 @@ apps_smmu: iommu@15000000 {
 		};
 
 		pcie_smmu: iommu@15200000 {
-			compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500";
+			compatible = "qcom,qcs9100-smmu-500", "qcom,smmu-500", "arm,mmu-500";
 			reg = <0x0 0x15200000 0x0 0x80000>;
 			#iommu-cells = <2>;
 			#global-interrupts = <2>;
@@ -3289,7 +3289,7 @@ intc: interrupt-controller@17a00000 {
 		};
 
 		watchdog@17c10000 {
-			compatible = "qcom,apss-wdt-sa8775p", "qcom,kpss-wdt";
+			compatible = "qcom,apss-wdt-qcs9100", "qcom,kpss-wdt";
 			reg = <0x0 0x17c10000 0x0 0x1000>;
 			clocks = <&sleep_clk>;
 			interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
@@ -3375,14 +3375,14 @@ apps_bcm_voter: bcm-voter {
 			};
 
 			rpmhcc: clock-controller {
-				compatible = "qcom,sa8775p-rpmh-clk";
+				compatible = "qcom,qcs9100-rpmh-clk";
 				#clock-cells = <1>;
 				clock-names = "xo";
 				clocks = <&xo_board_clk>;
 			};
 
 			rpmhpd: power-controller {
-				compatible = "qcom,sa8775p-rpmhpd";
+				compatible = "qcom,qcs9100-rpmhpd";
 				#power-domain-cells = <1>;
 				operating-points-v2 = <&rpmhpd_opp_table>;
 
@@ -3433,7 +3433,7 @@ rpmhpd_opp_turbo_l1: opp-9 {
 		};
 
 		cpufreq_hw: cpufreq@18591000 {
-			compatible = "qcom,sa8775p-cpufreq-epss",
+			compatible = "qcom,qcs9100-cpufreq-epss",
 				     "qcom,cpufreq-epss";
 			reg = <0x0 0x18591000 0x0 0x1000>,
 			      <0x0 0x18593000 0x0 0x1000>;
@@ -3446,7 +3446,7 @@ cpufreq_hw: cpufreq@18591000 {
 		};
 
 		ethernet1: ethernet@23000000 {
-			compatible = "qcom,sa8775p-ethqos";
+			compatible = "qcom,qcs9100-ethqos";
 			reg = <0x0 0x23000000 0x0 0x10000>,
 			      <0x0 0x23016000 0x0 0x100>;
 			reg-names = "stmmaceth", "rgmii";
@@ -3481,7 +3481,7 @@ ethernet1: ethernet@23000000 {
 		};
 
 		ethernet0: ethernet@23040000 {
-			compatible = "qcom,sa8775p-ethqos";
+			compatible = "qcom,qcs9100-ethqos";
 			reg = <0x0 0x23040000 0x0 0x10000>,
 			      <0x0 0x23056000 0x0 0x100>;
 			reg-names = "stmmaceth", "rgmii";
@@ -4495,7 +4495,7 @@ arch_timer: timer {
 	};
 
 	pcie0: pcie@1c00000 {
-		compatible = "qcom,pcie-sa8775p";
+		compatible = "qcom,pcie-qcs9100";
 		reg = <0x0 0x01c00000 0x0 0x3000>,
 		      <0x0 0x40000000 0x0 0xf20>,
 		      <0x0 0x40000f20 0x0 0xa8>,
@@ -4576,7 +4576,7 @@ pcie@0 {
 	};
 
 	pcie0_ep: pcie-ep@1c00000 {
-		compatible = "qcom,sa8775p-pcie-ep";
+		compatible = "qcom,qcs9100-pcie-ep";
 		reg = <0x0 0x01c00000 0x0 0x3000>,
 		      <0x0 0x40000000 0x0 0xf20>,
 		      <0x0 0x40000f20 0x0 0xa8>,
@@ -4623,7 +4623,7 @@ pcie0_ep: pcie-ep@1c00000 {
 	};
 
 	pcie0_phy: phy@1c04000 {
-		compatible = "qcom,sa8775p-qmp-gen4x2-pcie-phy";
+		compatible = "qcom,qcs9100-qmp-gen4x2-pcie-phy";
 		reg = <0x0 0x1c04000 0x0 0x2000>;
 
 		clocks = <&gcc GCC_PCIE_0_AUX_CLK>,
@@ -4652,7 +4652,7 @@ pcie0_phy: phy@1c04000 {
 	};
 
 	pcie1: pcie@1c10000 {
-		compatible = "qcom,pcie-sa8775p";
+		compatible = "qcom,pcie-qcs9100";
 		reg = <0x0 0x01c10000 0x0 0x3000>,
 		      <0x0 0x60000000 0x0 0xf20>,
 		      <0x0 0x60000f20 0x0 0xa8>,
@@ -4733,7 +4733,7 @@ pcie@0 {
 	};
 
 	pcie1_ep: pcie-ep@1c10000 {
-		compatible = "qcom,sa8775p-pcie-ep";
+		compatible = "qcom,qcs9100-pcie-ep";
 		reg = <0x0 0x01c10000 0x0 0x3000>,
 		      <0x0 0x60000000 0x0 0xf20>,
 		      <0x0 0x60000f20 0x0 0xa8>,
@@ -4780,7 +4780,7 @@ pcie1_ep: pcie-ep@1c10000 {
 	};
 
 	pcie1_phy: phy@1c14000 {
-		compatible = "qcom,sa8775p-qmp-gen4x4-pcie-phy";
+		compatible = "qcom,qcs9100-qmp-gen4x4-pcie-phy";
 		reg = <0x0 0x1c14000 0x0 0x4000>;
 
 		clocks = <&gcc GCC_PCIE_1_AUX_CLK>,
-- 
2.25.1

[PATCH 03/47] arm64: dts: qcom: qcs9100: Introduce QCS9100 PMIC dtsi

[Tengfei Fan]

Introduce QCS9100 PMIC dtsi.
The current QCS9100 PMIC dtsi is directly renamed from the SA8775p PMIC
dtsi. Currently, the QCS9100 platform and SA8775p platform have the same
PMIC requirements. In the future, as the SA8775p platform will
transitions to using SCMI resources, their PMIC requirements will differ.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../boot/dts/qcom/{sa8775p-pmics.dtsi => qcs9100-pmics.dtsi}      | 0
 1 file changed, 0 insertions(+), 0 deletions(-)
 rename arch/arm64/boot/dts/qcom/{sa8775p-pmics.dtsi => qcs9100-pmics.dtsi} (100%)

diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/qcs9100-pmics.dtsi
similarity index 100%
rename from arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi
rename to arch/arm64/boot/dts/qcom/qcs9100-pmics.dtsi
-- 
2.25.1

[PATCH 04/47] arm64: dts: qcom: qcs9100: Add QCS9100 RIDE board dts

[Tengfei Fan]

Add support for the QCS9100 RIDE board dts. The current QCS9100 RIDE
board dts is directly renamed from the SA8775p RIDE board dts.
The difference between the current QCS9100 RIDE board and the SA8775p
RIDE board lies solely in the replacement of the SA8775p SoC with the
QCS9100 SoC, all other board resources remain the same.
The following items have been updated:
  - use QCS9100-related compatible names for this board dts.
  - replace the inclusion of sa8775p.dtsi with qcs9100.dtsi.
  - replace the inclusion of sa8775p-pmics.dtsi with qcs9100-pmics.dtsi

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 arch/arm64/boot/dts/qcom/Makefile                         | 2 +-
 .../boot/dts/qcom/{sa8775p-ride.dts => qcs9100-ride.dts}  | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)
 rename arch/arm64/boot/dts/qcom/{sa8775p-ride.dts => qcs9100-ride.dts} (99%)

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 5576c7d6ea06..a7a3792b0691 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -103,6 +103,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-rb3gen2.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs8550-aim300-aiot.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= qcs9100-ride.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qdu1000-idp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qrb2210-rb1.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qrb4210-rb2.dtb
@@ -112,7 +113,6 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qru1000-idp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sa8155p-adp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sa8295p-adp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sa8540p-ride.dtb
-dtb-$(CONFIG_ARCH_QCOM)	+= sa8775p-ride.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-acer-aspire1.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-idp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-coachz-r1.dtb
diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts
similarity index 99%
rename from arch/arm64/boot/dts/qcom/sa8775p-ride.dts
rename to arch/arm64/boot/dts/qcom/qcs9100-ride.dts
index 26ad05bd3b3f..2415d34b8aa5 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts
@@ -8,12 +8,12 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
 
-#include "sa8775p.dtsi"
-#include "sa8775p-pmics.dtsi"
+#include "qcs9100.dtsi"
+#include "qcs9100-pmics.dtsi"
 
 / {
-	model = "Qualcomm SA8775P Ride";
-	compatible = "qcom,sa8775p-ride", "qcom,sa8775p";
+	model = "Qualcomm QCS9100 Ride";
+	compatible = "qcom,qcs9100-ride", "qcom,qcs9100";
 
 	aliases {
 		ethernet0 = &ethernet0;
-- 
2.25.1

[PATCH 05/47] dt-bindings: firmware: qcom,scm: document SCM on QCS9100 SoC

[Tengfei Fan]

Document scm compatible for QCS9100 SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
index 2cc83771d8e7..3596ae0e0610 100644
--- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
+++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
@@ -42,6 +42,7 @@ properties:
           - qcom,scm-msm8996
           - qcom,scm-msm8998
           - qcom,scm-qcm2290
+          - qcom,scm-qcs9100
           - qcom,scm-qdu1000
           - qcom,scm-sa8775p
           - qcom,scm-sc7180
-- 
2.25.1

[PATCH 06/47] dt-bindings: interconnect: qcom: document the interconnect compatibles for QCS9100

[Tengfei Fan]

Document for the RPMh interconnect compatibles on Qualcomm QCS9100
platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../bindings/interconnect/qcom,sa8775p-rpmh.yaml   | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml
index 2e0c0bc7a376..748fe2084ad8 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml
@@ -18,6 +18,20 @@ description: |
 properties:
   compatible:
     enum:
+      - qcom,qcs9100-aggre1-noc
+      - qcom,qcs9100-aggre2-noc
+      - qcom,qcs9100-clk-virt
+      - qcom,qcs9100-config-noc
+      - qcom,qcs9100-dc-noc
+      - qcom,qcs9100-gem-noc
+      - qcom,qcs9100-gpdsp-anoc
+      - qcom,qcs9100-lpass-ag-noc
+      - qcom,qcs9100-mc-virt
+      - qcom,qcs9100-mmss-noc
+      - qcom,qcs9100-nspa-noc
+      - qcom,qcs9100-nspb-noc
+      - qcom,qcs9100-pcie-anoc
+      - qcom,qcs9100-system-noc
       - qcom,sa8775p-aggre1-noc
       - qcom,sa8775p-aggre2-noc
       - qcom,sa8775p-clk-virt
-- 
2.25.1

[PATCH 07/47] dt-bindings: clock: document QCS9100 GCC compatible

[Tengfei Fan]

Document QCS9100 GCC compatible.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../devicetree/bindings/clock/qcom,sa8775p-gcc.yaml          | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml
index addbd323fa6d..0ca77054e527 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml
@@ -17,7 +17,10 @@ description: |
 
 properties:
   compatible:
-    const: qcom,sa8775p-gcc
+    items:
+      - enum:
+          - qcom,qcs9100-gcc
+          - qcom,sa8775p-gcc
 
   clocks:
     items:
-- 
2.25.1

[PATCH 08/47] dt-bindings: mailbox: qcom-ipcc: Document the QCS9100 IPCC

[Tengfei Fan]

Document the Inter-Processor Communication Controller on the QCS9100
Platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
index 05e4e1d51713..916c47fbc238 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
+++ b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
@@ -24,6 +24,7 @@ properties:
   compatible:
     items:
       - enum:
+          - qcom,qcs9100-ipcc
           - qcom,qdu1000-ipcc
           - qcom,sa8775p-ipcc
           - qcom,sc7280-ipcc
-- 
2.25.1

[PATCH 09/47] dt-bindings: phy: Add QMP UFS PHY comptible for QCS9100

[Tengfei Fan]

Document the QMP UFS PHY compatible for QCS9100.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml      | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
index f9cfbd0b2de6..f5c321a4a2f9 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
@@ -18,6 +18,7 @@ properties:
     enum:
       - qcom,msm8996-qmp-ufs-phy
       - qcom,msm8998-qmp-ufs-phy
+      - qcom,qcs9100-qmp-ufs-phy
       - qcom,sa8775p-qmp-ufs-phy
       - qcom,sc7180-qmp-ufs-phy
       - qcom,sc7280-qmp-ufs-phy
@@ -85,6 +86,7 @@ allOf:
           contains:
             enum:
               - qcom,msm8998-qmp-ufs-phy
+              - qcom,qcs9100-qmp-ufs-phy
               - qcom,sa8775p-qmp-ufs-phy
               - qcom,sc7180-qmp-ufs-phy
               - qcom,sc7280-qmp-ufs-phy
-- 
2.25.1

[PATCH 10/47] dt-bindings: crypto: ice: Document QCS9100 inline crypto engine

[Tengfei Fan]

Document the compatible used for the inline crypto engine found on
QCS9100.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml    | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
index 0304f074cf08..ad0944e05025 100644
--- a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
@@ -13,6 +13,7 @@ properties:
   compatible:
     items:
       - enum:
+          - qcom,qcs9100-inline-crypto-engine
           - qcom,sa8775p-inline-crypto-engine
           - qcom,sc7180-inline-crypto-engine
           - qcom,sc7280-inline-crypto-engine
-- 
2.25.1

[PATCH 11/47] dt-bindings: crypto: qcom,prng: document QCS9100

[Tengfei Fan]

Document QCS9100 compatible for the True Random Number Generator.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/crypto/qcom,prng.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/crypto/qcom,prng.yaml b/Documentation/devicetree/bindings/crypto/qcom,prng.yaml
index 89c88004b41b..e97226eb7a50 100644
--- a/Documentation/devicetree/bindings/crypto/qcom,prng.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom,prng.yaml
@@ -17,6 +17,7 @@ properties:
           - qcom,prng-ee  # 8996 and later using EE
       - items:
           - enum:
+              - qcom,qcs9100-trng
               - qcom,sa8775p-trng
               - qcom,sc7280-trng
               - qcom,sm8450-trng
-- 
2.25.1

[PATCH 12/47] dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for QCS9100

[Tengfei Fan]

Document the compatible string for USB phy found in Qualcomm QCS9100
SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml          | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml b/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml
index 519c2b403f66..cd0a723590f0 100644
--- a/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml
@@ -17,6 +17,7 @@ properties:
     oneOf:
       - items:
           - enum:
+              - qcom,qcs9100-usb-hs-phy
               - qcom,sa8775p-usb-hs-phy
               - qcom,sc8280xp-usb-hs-phy
           - const: qcom,usb-snps-hs-5nm-phy
-- 
2.25.1

[PATCH 13/47] dt-bindings: ufs: qcom: document QCS9100 UFS

[Tengfei Fan]

Document the compatible string for the UFS found on QCS9100.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/ufs/qcom,ufs.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
index 25a5edeea164..baee567fbcd6 100644
--- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
@@ -26,6 +26,7 @@ properties:
           - qcom,msm8994-ufshc
           - qcom,msm8996-ufshc
           - qcom,msm8998-ufshc
+          - qcom,qcs9100-ufshc
           - qcom,sa8775p-ufshc
           - qcom,sc7180-ufshc
           - qcom,sc7280-ufshc
@@ -146,6 +147,7 @@ allOf:
           contains:
             enum:
               - qcom,msm8998-ufshc
+              - qcom,qcs9100-ufshc
               - qcom,sa8775p-ufshc
               - qcom,sc7280-ufshc
               - qcom,sc8180x-ufshc
-- 
2.25.1

[PATCH 14/47] dt-bindings: phy: qcom,qmp-usb: Add QCS9100 USB3 PHY

[Tengfei Fan]

Add dt-bindings for USB3 PHY found on Qualcomm QCS9100.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml           | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
index 5755245ecfd6..8c1bc416646c 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
@@ -20,6 +20,7 @@ properties:
       - qcom,ipq8074-qmp-usb3-phy
       - qcom,ipq9574-qmp-usb3-phy
       - qcom,msm8996-qmp-usb3-phy
+      - qcom,qcs9100-qmp-usb3-uni-phy
       - com,qdu1000-qmp-usb3-uni-phy
       - qcom,sa8775p-qmp-usb3-uni-phy
       - qcom,sc8180x-qmp-usb3-uni-phy
@@ -111,6 +112,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,qcs9100-qmp-usb3-uni-phy
               - qcom,qdu1000-qmp-usb3-uni-phy
               - qcom,sa8775p-qmp-usb3-uni-phy
               - qcom,sc8180x-qmp-usb3-uni-phy
@@ -153,6 +155,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,qcs9100-qmp-usb3-uni-phy
               - qcom,sa8775p-qmp-usb3-uni-phy
               - qcom,sc8180x-qmp-usb3-uni-phy
               - qcom,sc8280xp-qmp-usb3-uni-phy
-- 
2.25.1

[PATCH 15/47] dt-bindings: usb: dwc3: Add QCS9100 compatible

[Tengfei Fan]

Document the QCS9100 dwc3 compatible.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
index efde47a5b145..07b0b6530b78 100644
--- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
@@ -26,6 +26,7 @@ properties:
           - qcom,msm8998-dwc3
           - qcom,qcm2290-dwc3
           - qcom,qcs404-dwc3
+          - qcom,qcs9100-dwc3
           - qcom,qdu1000-dwc3
           - qcom,sa8775p-dwc3
           - qcom,sc7180-dwc3
@@ -199,6 +200,7 @@ allOf:
               - qcom,msm8953-dwc3
               - qcom,msm8996-dwc3
               - qcom,msm8998-dwc3
+              - qcom,qcs9100-dwc3
               - qcom,sa8775p-dwc3
               - qcom,sc7180-dwc3
               - qcom,sc7280-dwc3
@@ -448,6 +450,7 @@ allOf:
               - qcom,ipq4019-dwc3
               - qcom,ipq8064-dwc3
               - qcom,msm8994-dwc3
+              - qcom,qcs9100-dwc3
               - qcom,qdu1000-dwc3
               - qcom,sa8775p-dwc3
               - qcom,sc7180-dwc3
-- 
2.25.1

[PATCH 16/47] dt-bindings: clock: qcom: describe the GPUCC clock for QCS9100

[Tengfei Fan]

Add the compatible for the Qualcomm Graphics Clock control module present
on QCS9100 platforms. It matches the generic QCom GPUCC description. Add
device-specific DT bindings defines as well.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
index 0858fd635282..33eb62ec4745 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
@@ -27,6 +27,7 @@ description: |
 properties:
   compatible:
     enum:
+      - qcom,qcs9100-gpucc
       - qcom,sdm845-gpucc
       - qcom,sa8775p-gpucc
       - qcom,sc7180-gpucc
-- 
2.25.1

[PATCH 17/47] dt-bindings: arm-smmu: Document QCS9100 GPU SMMU

[Tengfei Fan]

Document the GPU SMMU found on the QCS9100 platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 5c130cf06a21..82b7e1d40ce0 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -36,6 +36,7 @@ properties:
         items:
           - enum:
               - qcom,qcm2290-smmu-500
+              - qcom,qcs9100-smmu-500
               - qcom,qdu1000-smmu-500
               - qcom,sa8775p-smmu-500
               - qcom,sc7180-smmu-500
@@ -84,6 +85,7 @@ properties:
         items:
           - enum:
               - qcom,qcm2290-smmu-500
+              - qcom,qcs9100-smmu-500
               - qcom,sa8775p-smmu-500
               - qcom,sc7280-smmu-500
               - qcom,sc8280xp-smmu-500
@@ -385,6 +387,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,qcs9100-smmu-500
               - qcom,sa8775p-smmu-500
               - qcom,sc7280-smmu-500
               - qcom,sc8280xp-smmu-500
-- 
2.25.1

[PATCH 18/47] dt-bindings: phy: describe the Qualcomm SGMII PHY for QCS9100

[Tengfei Fan]

Document the Qualcomm SGMII PHY for the QCS9100 platforms.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml           | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml
index b9107759b2a5..74ec4579c0d6 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml
@@ -15,7 +15,10 @@ description:
 
 properties:
   compatible:
-    const: qcom,sa8775p-dwmac-sgmii-phy
+    items:
+      - enum:
+          - qcom,qcs9100-dwmac-sgmii-phy
+          - qcom,sa8775p-dwmac-sgmii-phy
 
   reg:
     items:
-- 
2.25.1

[PATCH 19/47] dt-bindings: cache: qcom,llcc: Add QCS9100 description

[Tengfei Fan]

Add the cache controller compatible and register region descriptions for
QCS9100 platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
index 68ea5f70b75f..a38c8b99099e 100644
--- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
+++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
@@ -21,6 +21,7 @@ properties:
   compatible:
     enum:
       - qcom,qdu1000-llcc
+      - qcom,qcs9100-llcc
       - qcom,sa8775p-llcc
       - qcom,sc7180-llcc
       - qcom,sc7280-llcc
@@ -85,6 +86,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,qcs9100-llcc
               - qcom,sa8775p-llcc
     then:
       properties:
-- 
2.25.1

[PATCH 20/47] dt-bindings: interrupt-controller: qcom,pdc: document pdc on QCS9100

[Tengfei Fan]

The QCS9100 SoC includes a PDC, document it.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml       | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
index 985fa10abb99..41fbfce838fa 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
@@ -26,6 +26,7 @@ properties:
   compatible:
     items:
       - enum:
+          - qcom,qcs9100-pdc
           - qcom,qdu1000-pdc
           - qcom,sa8775p-pdc
           - qcom,sc7180-pdc
-- 
2.25.1

[PATCH 21/47] dt-bindings: thermal: qcom-tsens: document the QCS9100 Temperature Sensor

[Tengfei Fan]

Document the Temperature Sensor (TSENS) on the QCS9100 Platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
index 99d9c526c0b6..ace2cf1975c4 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
@@ -51,6 +51,7 @@ properties:
               - qcom,msm8996-tsens
               - qcom,msm8998-tsens
               - qcom,qcm2290-tsens
+              - qcom,qcs9100-tsens
               - qcom,sa8775p-tsens
               - qcom,sc7180-tsens
               - qcom,sc7280-tsens
-- 
2.25.1

[PATCH 22/47] dt-bindings: soc: qcom,aoss-qmp: Document the QCS9100 AOSS channel

[Tengfei Fan]

Document the Always-On Subsystem side channel on the QCS9100 Platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
index 7afdb60edb22..80e1a8b43586 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
@@ -25,6 +25,7 @@ properties:
   compatible:
     items:
       - enum:
+          - qcom,qcs9100-aoss-qmp
           - qcom,qdu1000-aoss-qmp
           - qcom,sa8775p-aoss-qmp
           - qcom,sc7180-aoss-qmp
-- 
2.25.1

[PATCH 23/47] dt-bindings: pinctrl: add qcs9100-tlmm compatible

[Tengfei Fan]

Add qcs9100-tlmm compatible for QCS9100 SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml       | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml
index e9abbf2c0689..1bdec08efc4a 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml
@@ -17,7 +17,10 @@ allOf:
 
 properties:
   compatible:
-    const: qcom,sa8775p-tlmm
+    items:
+      - enum:
+          - qcom,qcs9100-tlmm
+          - qcom,sa8775p-tlmm
 
   reg:
     maxItems: 1
-- 
2.25.1

[PATCH 24/47] dt-bindings: soc: qcom: add qcom,qcs9100-imem compatible

[Tengfei Fan]

Add qcom,qcs9100-imem compatible name support.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/sram/qcom,imem.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/sram/qcom,imem.yaml b/Documentation/devicetree/bindings/sram/qcom,imem.yaml
index faef3d6e0a94..e45337a21232 100644
--- a/Documentation/devicetree/bindings/sram/qcom,imem.yaml
+++ b/Documentation/devicetree/bindings/sram/qcom,imem.yaml
@@ -21,6 +21,7 @@ properties:
           - qcom,msm8226-imem
           - qcom,msm8974-imem
           - qcom,qcs404-imem
+          - qcom,qcs9100-imem
           - qcom,qdu1000-imem
           - qcom,sa8775p-imem
           - qcom,sc7180-imem
-- 
2.25.1

[PATCH 25/47] dt-bindings: watchdog: qcom-wdt: document QCS9100

[Tengfei Fan]

Document the QCS9100 watchdog compatible.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
index 47587971fb0b..5a78816aeece 100644
--- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
@@ -26,6 +26,7 @@ properties:
               - qcom,apss-wdt-msm8994
               - qcom,apss-wdt-qcm2290
               - qcom,apss-wdt-qcs404
+              - qcom,apss-wdt-qcs9100
               - qcom,apss-wdt-sa8775p
               - qcom,apss-wdt-sc7180
               - qcom,apss-wdt-sc7280
-- 
2.25.1

[PATCH 26/47] dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for QCS9100

[Tengfei Fan]

Add bindings and update documentation for clock rpmh driver on QCS9100
SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
index ca857942ed6c..63e4b8f8e571 100644
--- a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
@@ -17,6 +17,7 @@ description: |
 properties:
   compatible:
     enum:
+      - qcom,qcs9100-rpmh-clk
       - qcom,qdu1000-rpmh-clk
       - qcom,sa8775p-rpmh-clk
       - qcom,sc7180-rpmh-clk
-- 
2.25.1

[PATCH 27/47] dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCS9100 compatibles

[Tengfei Fan]

Add compatible for EPSS CPUFREQ-HW on QCS9100.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
index 1e9797f96410..02875e7a44f9 100644
--- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
@@ -33,6 +33,7 @@ properties:
       - description: v2 of CPUFREQ HW (EPSS)
         items:
           - enum:
+              - qcom,qcs9100-cpufreq-epss
               - qcom,qdu1000-cpufreq-epss
               - qcom,sa8775p-cpufreq-epss
               - qcom,sc7280-cpufreq-epss
-- 
2.25.1

[PATCH 28/47] dt-bindings: power: qcom,rpmpd: document the QCS9100 RPMh Power Domains

[Tengfei Fan]

Document the RPMh Power Domains on the QCS9100 Platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/power/qcom,rpmpd.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
index 929b7ef9c1bc..0e5aaca38994 100644
--- a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
+++ b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
@@ -32,6 +32,7 @@ properties:
           - qcom,msm8998-rpmpd
           - qcom,qcm2290-rpmpd
           - qcom,qcs404-rpmpd
+          - qcom,qcs9100-rpmhpd
           - qcom,qdu1000-rpmhpd
           - qcom,qm215-rpmpd
           - qcom,sa8155p-rpmhpd
-- 
2.25.1

[PATCH 29/47] dt-bindings: net: qcom,ethqos: add description for qcs9100

[Tengfei Fan]

Add the compatible for the MAC controller on qcs9100 platforms. This MAC
works with a single interrupt so add minItems to the interrupts property.
The fourth clock's name is different here so change it. Enable relevant
PHY properties. Add the relevant compatibles to the binding document for
snps,dwmac as well.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/net/qcom,ethqos.yaml | 1 +
 Documentation/devicetree/bindings/net/snps,dwmac.yaml  | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
index 6672327358bc..8ab11e00668c 100644
--- a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
+++ b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
@@ -20,6 +20,7 @@ properties:
   compatible:
     enum:
       - qcom,qcs404-ethqos
+      - qcom,qcs9100-ethqos
       - qcom,sa8775p-ethqos
       - qcom,sc8280xp-ethqos
       - qcom,sm8150-ethqos
diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index 3bab4e1f3fbf..269c21779396 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -67,6 +67,7 @@ properties:
         - loongson,ls2k-dwmac
         - loongson,ls7a-dwmac
         - qcom,qcs404-ethqos
+        - qcom,qcs9100-ethqos
         - qcom,sa8775p-ethqos
         - qcom,sc8280xp-ethqos
         - qcom,sm8150-ethqos
@@ -582,6 +583,7 @@ allOf:
               - ingenic,x1600-mac
               - ingenic,x1830-mac
               - ingenic,x2000-mac
+              - qcom,qcs9100-ethqos
               - qcom,sa8775p-ethqos
               - qcom,sc8280xp-ethqos
               - snps,dwmac-3.50a
@@ -639,6 +641,7 @@ allOf:
               - ingenic,x1830-mac
               - ingenic,x2000-mac
               - qcom,qcs404-ethqos
+              - qcom,qcs9100-ethqos
               - qcom,sa8775p-ethqos
               - qcom,sc8280xp-ethqos
               - qcom,sm8150-ethqos
-- 
2.25.1

[PATCH 30/47] dt-bindings: PCI: Document compatible for QCS9100

[Tengfei Fan]

Document compatible for QCS9100 platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
index efde49d1bef8..4de33df6963f 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
@@ -16,7 +16,10 @@ description:
 
 properties:
   compatible:
-    const: qcom,pcie-sa8775p
+    items:
+      - enum:
+          - qcom,pcie-qcs9100
+          - qcom,pcie-sa8775p
 
   reg:
     minItems: 6
-- 
2.25.1

[PATCH 31/47] dt-bindings: PCI: qcom-ep: Add support for QCS9100 SoC

[Tengfei Fan]

Add devicetree bindings support for QCS9100 SoC. It has DMA register
space and dma interrupt to support HDMA.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
index 46802f7d9482..8012663e7efc 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
@@ -13,6 +13,7 @@ properties:
   compatible:
     oneOf:
       - enum:
+          - qcom,qcs9100-pcie-ep
           - qcom,sa8775p-pcie-ep
           - qcom,sdx55-pcie-ep
           - qcom,sm8450-pcie-ep
@@ -203,6 +204,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,qcs9100-pcie-ep
               - qcom,sa8775p-pcie-ep
     then:
       properties:
-- 
2.25.1

[PATCH 32/47] dt-bindings: phy: qcom,qmp: Add qcs9100 QMP PCIe PHY

[Tengfei Fan]

Add devicetree YAML binding for Qualcomm QMP PCIe PHY
for QCS9100 platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml   | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
index 03dbd02cf9e7..d128ac8cb583 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
@@ -16,6 +16,8 @@ description:
 properties:
   compatible:
     enum:
+      - qcom,qcs9100-qmp-gen4x2-pcie-phy
+      - qcom,qcs9100-qmp-gen4x4-pcie-phy
       - qcom,sa8775p-qmp-gen4x2-pcie-phy
       - qcom,sa8775p-qmp-gen4x4-pcie-phy
       - qcom,sc8180x-qmp-pcie-phy
@@ -181,6 +183,8 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,qcs9100-qmp-gen4x2-pcie-phy
+              - qcom,qcs9100-qmp-gen4x4-pcie-phy
               - qcom,sa8775p-qmp-gen4x2-pcie-phy
               - qcom,sa8775p-qmp-gen4x4-pcie-phy
     then:
-- 
2.25.1

[PATCH 33/47] interconnect: qcom: add driver support for qcs9100

[Tengfei Fan]

Introduce QCS9100-specific interconnect driver support.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 drivers/interconnect/qcom/sa8775p.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/interconnect/qcom/sa8775p.c b/drivers/interconnect/qcom/sa8775p.c
index a729775c2aa4..72eb94a8873d 100644
--- a/drivers/interconnect/qcom/sa8775p.c
+++ b/drivers/interconnect/qcom/sa8775p.c
@@ -2499,6 +2499,20 @@ static const struct qcom_icc_desc sa8775p_system_noc = {
 };
 
 static const struct of_device_id qnoc_of_match[] = {
+	{ .compatible = "qcom,qcs9100-aggre1-noc", .data = &sa8775p_aggre1_noc, },
+	{ .compatible = "qcom,qcs9100-aggre2-noc", .data = &sa8775p_aggre2_noc, },
+	{ .compatible = "qcom,qcs9100-clk-virt", .data = &sa8775p_clk_virt, },
+	{ .compatible = "qcom,qcs9100-config-noc", .data = &sa8775p_config_noc, },
+	{ .compatible = "qcom,qcs9100-dc-noc", .data = &sa8775p_dc_noc, },
+	{ .compatible = "qcom,qcs9100-gem-noc", .data = &sa8775p_gem_noc, },
+	{ .compatible = "qcom,qcs9100-gpdsp-anoc", .data = &sa8775p_gpdsp_anoc, },
+	{ .compatible = "qcom,qcs9100-lpass-ag-noc", .data = &sa8775p_lpass_ag_noc, },
+	{ .compatible = "qcom,qcs9100-mc-virt", .data = &sa8775p_mc_virt, },
+	{ .compatible = "qcom,qcs9100-mmss-noc", .data = &sa8775p_mmss_noc, },
+	{ .compatible = "qcom,qcs9100-nspa-noc", .data = &sa8775p_nspa_noc, },
+	{ .compatible = "qcom,qcs9100-nspb-noc", .data = &sa8775p_nspb_noc, },
+	{ .compatible = "qcom,qcs9100-pcie-anoc", .data = &sa8775p_pcie_anoc, },
+	{ .compatible = "qcom,qcs9100-system-noc", .data = &sa8775p_system_noc, },
 	{ .compatible = "qcom,sa8775p-aggre1-noc", .data = &sa8775p_aggre1_noc, },
 	{ .compatible = "qcom,sa8775p-aggre2-noc", .data = &sa8775p_aggre2_noc, },
 	{ .compatible = "qcom,sa8775p-clk-virt", .data = &sa8775p_clk_virt, },
-- 
2.25.1

[PATCH 34/47] clk: qcom: add the GCC driver support for QCS9100

[Tengfei Fan]

Add support for the Global Clock Controller found in the QCS9100
plarform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 drivers/clk/qcom/gcc-sa8775p.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/qcom/gcc-sa8775p.c b/drivers/clk/qcom/gcc-sa8775p.c
index e7425e82c54f..e0f024f6c469 100644
--- a/drivers/clk/qcom/gcc-sa8775p.c
+++ b/drivers/clk/qcom/gcc-sa8775p.c
@@ -4656,6 +4656,7 @@ static const struct qcom_cc_desc gcc_sa8775p_desc = {
 };
 
 static const struct of_device_id gcc_sa8775p_match_table[] = {
+	{ .compatible = "qcom,qcs9100-gcc" },
 	{ .compatible = "qcom,sa8775p-gcc" },
 	{ }
 };
-- 
2.25.1

[PATCH 35/47] phy: qcom-qmp-ufs: Add QCS9100 support

[Tengfei Fan]

Add the tables and constants for init sequences for UFS QMP phy found in
QCS9100 SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
index a57e8a4657f4..cb72843218cc 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
@@ -2010,6 +2010,9 @@ static const struct of_device_id qmp_ufs_of_match_table[] = {
 	}, {
 		.compatible = "qcom,msm8998-qmp-ufs-phy",
 		.data = &sdm845_ufsphy_cfg,
+	}, {
+		.compatible = "qcom,qcs9100-qmp-ufs-phy",
+		.data = &sa8775p_ufsphy_cfg,
 	}, {
 		.compatible = "qcom,sa8775p-qmp-ufs-phy",
 		.data = &sa8775p_ufsphy_cfg,
-- 
2.25.1

[PATCH 36/47] phy: qcpm-qmp-usb: Add support for QCS9100

[Tengfei Fan]

Add support for QCS9100 USB3 PHY.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
index 9b0eb87b1680..4ebfac113d86 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
@@ -2246,6 +2246,9 @@ static const struct of_device_id qmp_usb_of_match_table[] = {
 	}, {
 		.compatible = "qcom,msm8996-qmp-usb3-phy",
 		.data = &msm8996_usb3phy_cfg,
+	}, {
+		.compatible = "qcom,qcs9100-qmp-usb3-uni-phy",
+		.data = &sa8775p_usb3_uniphy_cfg,
 	}, {
 		.compatible = "qcom,qdu1000-qmp-usb3-uni-phy",
 		.data = &qdu1000_usb3_uniphy_cfg,
-- 
2.25.1

[PATCH 37/47] clk: qcom: add the GPUCC driver support for QCS9100

[Tengfei Fan]

Add the clock driver support for the Qualcomm Graphics Clock control
module.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 drivers/clk/qcom/gpucc-sa8775p.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/qcom/gpucc-sa8775p.c b/drivers/clk/qcom/gpucc-sa8775p.c
index f8a8ac343d70..89ca1289cd74 100644
--- a/drivers/clk/qcom/gpucc-sa8775p.c
+++ b/drivers/clk/qcom/gpucc-sa8775p.c
@@ -584,6 +584,7 @@ static const struct qcom_cc_desc gpu_cc_sa8775p_desc = {
 
 static const struct of_device_id gpu_cc_sa8775p_match_table[] = {
 	{ .compatible = "qcom,sa8775p-gpucc" },
+	{ .compatible = "qcom,qcs9100-gpucc" },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, gpu_cc_sa8775p_match_table);
-- 
2.25.1

[PATCH 38/47] phy: qcom: add the SGMII SerDes PHY driver support

[Tengfei Fan]

Add the SGMII SerDes PHY driver support for QCS9100 platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 drivers/phy/qualcomm/phy-qcom-sgmii-eth.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-sgmii-eth.c b/drivers/phy/qualcomm/phy-qcom-sgmii-eth.c
index 5b1c82459c12..0ea7140564a9 100644
--- a/drivers/phy/qualcomm/phy-qcom-sgmii-eth.c
+++ b/drivers/phy/qualcomm/phy-qcom-sgmii-eth.c
@@ -353,6 +353,7 @@ static int qcom_dwmac_sgmii_phy_probe(struct platform_device *pdev)
 }
 
 static const struct of_device_id qcom_dwmac_sgmii_phy_of_match[] = {
+	{ .compatible = "qcom,qcs9100-dwmac-sgmii-phy" },
 	{ .compatible = "qcom,sa8775p-dwmac-sgmii-phy" },
 	{ },
 };
-- 
2.25.1

[PATCH 39/47] soc: qcom: llcc: Add llcc configuration support for the QCS9100 platform

[Tengfei Fan]

Add llcc configuration support for the QCS9100 platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 drivers/soc/qcom/llcc-qcom.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c
index 110b1f89aa59..5a0840df4ba8 100644
--- a/drivers/soc/qcom/llcc-qcom.c
+++ b/drivers/soc/qcom/llcc-qcom.c
@@ -1379,6 +1379,7 @@ static int qcom_llcc_probe(struct platform_device *pdev)
 }
 
 static const struct of_device_id qcom_llcc_of_match[] = {
+	{ .compatible = "qcom,qcs9100-llcc", .data = &sa8775p_cfgs },
 	{ .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs},
 	{ .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs },
 	{ .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs },
-- 
2.25.1

[PATCH 40/47] pinctrl: qcom: add the tlmm driver support for qcs9100 platform

[Tengfei Fan]

Add the tlmm driver support for QCS9100 platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 drivers/pinctrl/qcom/pinctrl-sa8775p.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pinctrl/qcom/pinctrl-sa8775p.c b/drivers/pinctrl/qcom/pinctrl-sa8775p.c
index 5459c0c681a2..4687e11dfe75 100644
--- a/drivers/pinctrl/qcom/pinctrl-sa8775p.c
+++ b/drivers/pinctrl/qcom/pinctrl-sa8775p.c
@@ -1519,6 +1519,7 @@ static int sa8775p_pinctrl_probe(struct platform_device *pdev)
 }
 
 static const struct of_device_id sa8775p_pinctrl_of_match[] = {
+	{ .compatible = "qcom,qcs9100-tlmm", },
 	{ .compatible = "qcom,sa8775p-tlmm", },
 	{ },
 };
-- 
2.25.1

[PATCH 41/47] clk: qcom: rpmh: Add support for QCS9100 rpmh clocks

[Tengfei Fan]

Adds the RPMH clocks present in QCS9100 SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 drivers/clk/qcom/clk-rpmh.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
index bb82abeed88f..8131afba85d6 100644
--- a/drivers/clk/qcom/clk-rpmh.c
+++ b/drivers/clk/qcom/clk-rpmh.c
@@ -876,6 +876,7 @@ static int clk_rpmh_probe(struct platform_device *pdev)
 }
 
 static const struct of_device_id clk_rpmh_match_table[] = {
+	{ .compatible = "qcom,qcs9100-rpmh-clk", .data = &clk_rpmh_sa8775p},
 	{ .compatible = "qcom,qdu1000-rpmh-clk", .data = &clk_rpmh_qdu1000},
 	{ .compatible = "qcom,sa8775p-rpmh-clk", .data = &clk_rpmh_sa8775p},
 	{ .compatible = "qcom,sc7180-rpmh-clk", .data = &clk_rpmh_sc7180},
-- 
2.25.1

[PATCH 00/47] arm64: qcom: dts: add QCS9100 support

[Tengfei Fan]

Introduce support for the QCS9100 SoC device tree (DTSI) and the
QCS9100 RIDE board DTS. The QCS9100 is a variant of the SA8775p.
While the QCS9100 platform is still in the early design stage, the
QCS9100 RIDE board is identical to the SA8775p RIDE board, except it
mounts the QCS9100 SoC instead of the SA8775p SoC.

The QCS9100 SoC DTSI was directly renamed from the SA8775p SoC DTSI. In
the upcoming weeks, Nikunj Kela will develop a new device tree related
to SA8775p, specifically supporting the SCMI resource firmware solution
for the SA8775p platform. If you're already familiar with the
background, feel free to skip part[2], which provides a detailed
explanation.

All compatible strings have been updated from “SA8775P” to “QCS9100.”
If you’re already aware of the context, feel free to skip part[3], which
provides a detailed explanation of various other options.

Here’s the reason and background: Bjorn Andersson, Nikunj Kela,
Srinivas Kandagatla, and other Qualcomm engineers contributed to the
current design, and we’ve finalized this series for broader audience
review.

*This patch series aligns with upstream efforts toward a new design
solution: “Using logical performance and power domains to achieve
resource abstraction over SCMI.” For more details, refer to [1]:
[1]https://resources.linaro.org/en/resource/wfnfEwBhRjLV1PEAJoDDte

*The SA8775p-RIDE will transition to using SCMI resources. This involves
migrating to SCMI power and performance protocols for requesting and
configuring peripheral resources such as clocks, regulators,
interconnects, and PHYs. Consequently, most devices in the SA8775p-RIDE
will require updates to drivers, bindings, and device trees.

*The QCS9100-RIDE project will continue using the existing resources.
It will rely on the current kernel infrastructure for clocks, regulators,
interconnects, PHYs, and APIs.

[2] The reason of qcs9100.dtsi renamed from sa8775.dtsi:
The proposal is to maintain two separate platform.dtsi files.
qcs9100.dtsi for non-scmi resources and sa8775p.dtsi for SCMI resources.
Currently, the upstream sa8775p.dtsi contains 176 nodes with specified
“compatible” strings. Among these, 142 nodes require distinct properties
for SCMI and non-SCMI. As the IoT target is being upstreamed, both node
counts are expected to increase for the IoT/QCS platform.

If we do not implement platform separation, any modifications to the
base sa8775p.dtsi-whether for automotive or IoT purposes-must consider
the other platform. Each node(e.g., remoteproc, multimedia) added should
be countered with an overlay that disables it in the automotive context.
Care must be taken to avoid introducing changes that inferfere with the
automotive system design, This structure poses challenges for human
reasioning, leading to issues during development, code review, and
maintenance.

Furthermore, we are addressing the complexity of resuing marketing names
accross both the IoT(QCS9100) and automotive(SA8775p) platforms. This
decision has significations throughout DeviceTree and the kernel.
Consequently, renameing the QCS9100 device tree files from the SA8775p
device files is our definitive choice.

[3] The reason of All Compatible Strings Changed from “SA8775P” to
“QCS9100”:
During discussions, three options were considered. Ultimately, Option
B was chosen as the best approach for separating QCS projects from SA
projects. This decision simplifies the reviewer’s task by focusing on
each platform independently. Developers only need to verify the
affected platform.

*Option A: “And” (qcs9100+sa8775):

Add all qcs9100-compatible strings alongside the current
sa8775p-compatible strings in each binding file. For example:
aggre1_noc: interconnect-aggre1-noc {
-    compatible = "qcom,sa8775p-aggre1-noc";
+    compatible = "qcom,qcs9100-aggre1-noc", "qcom,sa8775p-aggre1-noc";
    #interconnect-cells = <2>;
    qcom,bcm-voters = <&apps_bcm_voter>; };

Some device tree (DT) nodes may share common compatibles. For instance:
firmware {
    scm {
-        compatible = "qcom,scm-sa8775p", "qcom,scm";
+        compatible = "qcom,scm-qcs9100", "qcom,scm";
    };
};

Approximately 50+ sa8775p-related compatible names need to be changed
to qcs9100-compatible names in the binding files and DT nodes.
When the SCMI resource driver owner adds SCMI support, they need to
update both the qcs9100 DT (non-SCMI resource) and the sa8775 DT (SCMI
resource) simultaneously.
For this option:

DT and binding changes are needed.
No driver C file changes are required at this time.
Technical driver owners must handle both the qcs DT and sa DT.

*Option B: “Or” (qcs9100 or sa8775):

Replace all qcs9100-compatible strings with the current
sa8775p-compatible strings in the qcs9100 DT. For example:
aggre1_noc: interconnect-aggre1-noc {
-    compatible = "qcom,sa8775p-aggre1-noc";
+    compatible = "qcom,qcs9100-aggre1-noc";
    #interconnect-cells = <2>;
    qcom,bcm-voters = <&apps_bcm_voter>; };

Add the necessary “qcs9100” compatible strings to the C driver. In
drivers/interconnect/qcom/sa8775p.c:
static const struct of_device_id qnoc_of_match[] = {
    { .compatible = "qcom,sa8775p-aggre1-noc", .data = &sa8775p_aggre1_noc },
+   { .compatible = "qcom,qcs9100-aggre1-noc", .data =
&sa8775p_aggre1_noc },
    { .compatible = "qcom,sa8775p-aggre2-noc", .data = &sa8775p_aggre2_noc },
+   { .compatible = "qcom,qcs9100-aggre2-noc", .data =
&sa8775p_aggre2_noc },
    // ...
};

Some DT nodes may share common compatibles, similar to the example above.
Approximately 50+ sa8775p-related compatible names need to be changed to
qcs9100-compatible names in the binding files and DT nodes.
When the SCMI resource driver owner adds SCMI support, they only need to
update the sa8775 DT (SCMI resource).
For this option:
DT, binding, and C driver changes are needed.
Technical driver owners only need to handle the sa DT.

*Option C: “Depends” (sa8775 in qcs9100, depends on driver to change
necessary driver + DT later):
This option depends on the SCMI resource solution and requires minimal
driver changes.

Change common compatibles to “qcs9100,” as shown in the example:
firmware {
    scm {
-        compatible = "qcom,scm-sa8775p", "qcom,scm";
+        compatible = "qcom,scm-qcs9100", "qcom,scm";
    };
};

Approximately 30+ sa8775p-related compatible names need to be changed
to qcs9100-compatible names in the binding files and DT nodes.
When the SCMI resource driver owner adds SCMI support, they must
update both the qcs9100 DT and the sa8775 DT (SCMI resource)
simultaneously.
For example:

{ .compatible = "qcom,sa8775p-aggre1-noc", .data = &sa8775p_aggre1_noc },
+ { .compatible = "qcom,qcs9100-aggre1-noc", .data = &qcs9100_aggre1_noc
+ },
{ .compatible = "qcom,sa8775p-aggre2-noc", .data = &sa8775p_aggre2_noc },
+ { .compatible = "qcom,qcs9100-aggre2-noc", .data = &qcs9100_aggre2_noc
+ },
// ...

For this option:
DT changes are needed.
Technical driver owners are responsible for making the final different
driver changes and ensuring the exact binding of qcs9100 and sa8775
with different compatibles.

In summary, the current solution primarily targets SCMI-based resource
transactions. However, both the qcs project and the SA project, which
are in the development stage, require independent development processes.

Co-developed-by: Maria Yu <quic_aiquny@quicinc.com>
Signed-off-by: Maria Yu <quic_aiquny@quicinc.com>
Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---

Tengfei Fan (47):
  dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board
  arm64: dts: qcom: qcs9100: Introduce QCS9100 SoC dtsi
  arm64: dts: qcom: qcs9100: Introduce QCS9100 PMIC dtsi
  arm64: dts: qcom: qcs9100: Add QCS9100 RIDE board dts
  dt-bindings: firmware: qcom,scm: document SCM on QCS9100 SoC
  dt-bindings: interconnect: qcom: document the interconnect compatibles
    for QCS9100
  dt-bindings: clock: document QCS9100 GCC compatible
  dt-bindings: mailbox: qcom-ipcc: Document the QCS9100 IPCC
  dt-bindings: phy: Add QMP UFS PHY comptible for QCS9100
  dt-bindings: crypto: ice: Document QCS9100 inline crypto engine
  dt-bindings: crypto: qcom,prng: document QCS9100
  dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for QCS9100
  dt-bindings: ufs: qcom: document QCS9100 UFS
  dt-bindings: phy: qcom,qmp-usb: Add QCS9100 USB3 PHY
  dt-bindings: usb: dwc3: Add QCS9100 compatible
  dt-bindings: clock: qcom: describe the GPUCC clock for QCS9100
  dt-bindings: arm-smmu: Document QCS9100 GPU SMMU
  dt-bindings: phy: describe the Qualcomm SGMII PHY for QCS9100
  dt-bindings: cache: qcom,llcc: Add QCS9100 description
  dt-bindings: interrupt-controller: qcom,pdc: document pdc on QCS9100
  dt-bindings: thermal: qcom-tsens: document the QCS9100 Temperature
    Sensor
  dt-bindings: soc: qcom,aoss-qmp: Document the QCS9100 AOSS channel
  dt-bindings: pinctrl: add qcs9100-tlmm compatible
  dt-bindings: soc: qcom: add qcom,qcs9100-imem compatible
  dt-bindings: watchdog: qcom-wdt: document QCS9100
  dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for QCS9100
  dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCS9100 compatibles
  dt-bindings: power: qcom,rpmpd: document the QCS9100 RPMh Power
    Domains
  dt-bindings: net: qcom,ethqos: add description for qcs9100
  dt-bindings: PCI: Document compatible for QCS9100
  dt-bindings: PCI: qcom-ep: Add support for QCS9100 SoC
  dt-bindings: phy: qcom,qmp: Add qcs9100 QMP PCIe PHY
  interconnect: qcom: add driver support for qcs9100
  clk: qcom: add the GCC driver support for QCS9100
  phy: qcom-qmp-ufs: Add QCS9100 support
  phy: qcpm-qmp-usb: Add support for QCS9100
  clk: qcom: add the GPUCC driver support for QCS9100
  phy: qcom: add the SGMII SerDes PHY driver support
  soc: qcom: llcc: Add llcc configuration support for the QCS9100
    platform
  pinctrl: qcom: add the tlmm driver support for qcs9100 platform
  clk: qcom: rpmh: Add support for QCS9100 rpmh clocks
  soc: qcom: rmphpd: add power domains for QCS9100
  net: stmmac: dwmac-qcom-ethqos: add support for emac4 on qcs9100
    platforms
  PCI: qcom: Add support for QCS9100 SoC
  PCI: qcom-ep: Add HDMA support for QCS9100 SoC
  cpufreq: qcom-nvmem: add support for QCS9100
  phy: qcom-qmp-pcie: add x4 lane EP support for QCS9100

 .../devicetree/bindings/arm/qcom.yaml         |   3 +
 .../devicetree/bindings/cache/qcom,llcc.yaml  |   2 +
 .../devicetree/bindings/clock/qcom,gpucc.yaml |   1 +
 .../bindings/clock/qcom,rpmhcc.yaml           |   1 +
 .../bindings/clock/qcom,sa8775p-gcc.yaml      |   5 +-
 .../bindings/cpufreq/cpufreq-qcom-hw.yaml     |   1 +
 .../crypto/qcom,inline-crypto-engine.yaml     |   1 +
 .../devicetree/bindings/crypto/qcom,prng.yaml |   1 +
 .../bindings/firmware/qcom,scm.yaml           |   1 +
 .../interconnect/qcom,sa8775p-rpmh.yaml       |  14 +++
 .../interrupt-controller/qcom,pdc.yaml        |   1 +
 .../devicetree/bindings/iommu/arm,smmu.yaml   |   3 +
 .../bindings/mailbox/qcom-ipcc.yaml           |   1 +
 .../devicetree/bindings/net/qcom,ethqos.yaml  |   1 +
 .../devicetree/bindings/net/snps,dwmac.yaml   |   3 +
 .../devicetree/bindings/pci/qcom,pcie-ep.yaml |   2 +
 .../bindings/pci/qcom,pcie-sa8775p.yaml       |   5 +-
 .../phy/qcom,sa8775p-dwmac-sgmii-phy.yaml     |   5 +-
 .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml       |   4 +
 .../phy/qcom,sc8280xp-qmp-ufs-phy.yaml        |   2 +
 .../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml   |   3 +
 .../bindings/phy/qcom,usb-snps-femto-v2.yaml  |   1 +
 .../bindings/pinctrl/qcom,sa8775p-tlmm.yaml   |   5 +-
 .../devicetree/bindings/power/qcom,rpmpd.yaml |   1 +
 .../bindings/soc/qcom/qcom,aoss-qmp.yaml      |   1 +
 .../devicetree/bindings/sram/qcom,imem.yaml   |   1 +
 .../bindings/thermal/qcom-tsens.yaml          |   1 +
 .../devicetree/bindings/ufs/qcom,ufs.yaml     |   2 +
 .../devicetree/bindings/usb/qcom,dwc3.yaml    |   3 +
 .../bindings/watchdog/qcom-wdt.yaml           |   1 +
 arch/arm64/boot/dts/qcom/Makefile             |   2 +-
 ...{sa8775p-pmics.dtsi => qcs9100-pmics.dtsi} |   0
 .../{sa8775p-ride.dts => qcs9100-ride.dts}    |   8 +-
 .../dts/qcom/{sa8775p.dtsi => qcs9100.dtsi}   | 112 +++++++++---------
 drivers/clk/qcom/clk-rpmh.c                   |   1 +
 drivers/clk/qcom/gcc-sa8775p.c                |   1 +
 drivers/clk/qcom/gpucc-sa8775p.c              |   1 +
 drivers/cpufreq/cpufreq-dt-platdev.c          |   1 +
 drivers/interconnect/qcom/sa8775p.c           |  14 +++
 .../stmicro/stmmac/dwmac-qcom-ethqos.c        |   1 +
 drivers/pci/controller/dwc/pcie-qcom-ep.c     |   1 +
 drivers/pci/controller/dwc/pcie-qcom.c        |   1 +
 drivers/phy/qualcomm/phy-qcom-qmp-pcie.c      |   6 +
 drivers/phy/qualcomm/phy-qcom-qmp-ufs.c       |   3 +
 drivers/phy/qualcomm/phy-qcom-qmp-usb.c       |   3 +
 drivers/phy/qualcomm/phy-qcom-sgmii-eth.c     |   1 +
 drivers/pinctrl/qcom/pinctrl-sa8775p.c        |   1 +
 drivers/pmdomain/qcom/rpmhpd.c                |   1 +
 drivers/soc/qcom/llcc-qcom.c                  |   1 +
 49 files changed, 170 insertions(+), 65 deletions(-)
 rename arch/arm64/boot/dts/qcom/{sa8775p-pmics.dtsi => qcs9100-pmics.dtsi} (100%)
 rename arch/arm64/boot/dts/qcom/{sa8775p-ride.dts => qcs9100-ride.dts} (99%)
 rename arch/arm64/boot/dts/qcom/{sa8775p.dtsi => qcs9100.dtsi} (97%)


base-commit: 82e4255305c554b0bb18b7ccf2db86041b4c8b6e
-- 
2.25.1

[PATCH 01/47] dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board

[Tengfei Fan]

Document the QCS9100 SoC and RIDE board.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/arm/qcom.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
index ec1c10a12470..f06543f96026 100644
--- a/Documentation/devicetree/bindings/arm/qcom.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom.yaml
@@ -45,6 +45,7 @@ description: |
         qcs8550
         qcm2290
         qcm6490
+        qcs9100
         qdu1000
         qrb2210
         qrb4210
@@ -894,7 +895,9 @@ properties:
 
       - items:
           - enum:
+              - qcom,qcs9100-ride
               - qcom,sa8775p-ride
+          - const: qcom,qcs9100
           - const: qcom,sa8775p
 
       - items:
-- 
2.25.1

[PATCH 02/47] arm64: dts: qcom: qcs9100: Introduce QCS9100 SoC dtsi

[Tengfei Fan]

Introduce QCS9100 SoC dtsi, QCS9100 is mainly used in IoT products.
QCS9100 is drived from SA8775p.
The current QCS9100 SoC dtsi is directly renamed from the SA8775p SoC
dtsi.
The QCS9100 platform is currently in the early design stage. Currently,
Both the QCS9100 platform and SA8775p platform use non-SCMI resources,
In the future, the SA8775p platform will transition to using SCMI
resources and it will have new sa8775p-related device tree.
This QCS9100 SoC dtsi remains consistent with the current SA8775p SoC
dtsi, except for updating the following sa8775p-related compatible names
to the qcs9100-related compatible name:
  - qcom,sa8775p-clk-virt
  - qcom,sa8775p-mc-virt
  - qcom,sa8775p-adsp-pas
  - qcom,sa8775p-cdsp-pas
  - qcom,sa8775p-cdsp1-pas
  - qcom,sa8775p-gpdsp0-pas
  - qcom,sa8775p-gpdsp1-pas
  - qcom,sa8775p-gcc
  - qcom,sa8775p-ipcc
  - qcom,sa8775p-config-noc
  - qcom,sa8775p-system-noc
  - qcom,sa8775p-aggre1-noc
  - qcom,sa8775p-aggre2-noc
  - qcom,sa8775p-pcie-anoc
  - qcom,sa8775p-gpdsp-anoc
  - qcom,sa8775p-mmss-noc
  - qcom,sa8775p-trng
  - qcom,sa8775p-ufshc
  - qcom,sa8775p-qmp-ufs-phy
  - qcom,sa8775p-qce
  - qcom,sa8775p-lpass-ag-noc
  - qcom,sa8775p-usb-hs-phy
  - qcom,sa8775p-dc-noc
  - qcom,sa8775p-gem-noc
  - qcom,sa8775p-dwc3
  - qcom,sa8775p-qmp-usb3-uni-phy
  - qcom,sa8775p-gpucc
  - qcom,sa8775p-smmu-500
  - qcom,sa8775p-dwmac-sgmii-phy
  - qcom,sa8775p-llcc-bwmon
  - qcom,sa8775p-cpu-bwmon
  - qcom,sa8775p-llcc
  - qcom,sa8775p-videocc
  - qcom,sa8775p-camcc
  - qcom,sa8775p-dispcc0
  - qcom,sa8775p-pdc
  - qcom,sa8775p-aoss-qmp
  - qcom,sa8775p-tlmm
  - qcom,sa8775p-imem
  - qcom,sa8775p-smmu-500
  - qcom,sa8775p-rpmh-clk
  - qcom,sa8775p-rpmhpd
  - qcom,sa8775p-cpufreq-epss
  - qcom,sa8775p-dispcc1
  - qcom,sa8775p-ethqos
  - qcom,sa8775p-nspa-noc
  - qcom,sa8775p-nspb-noc
  - qcom,sa8775p-qmp-gen4x2-pcie-phy
  - qcom,sa8775p-qmp-gen4x4-pcie-phy

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../dts/qcom/{sa8775p.dtsi => qcs9100.dtsi}   | 112 +++++++++---------
 1 file changed, 56 insertions(+), 56 deletions(-)
 rename arch/arm64/boot/dts/qcom/{sa8775p.dtsi => qcs9100.dtsi} (97%)

diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/qcs9100.dtsi
similarity index 97%
rename from arch/arm64/boot/dts/qcom/sa8775p.dtsi
rename to arch/arm64/boot/dts/qcom/qcs9100.dtsi
index 23f1b2e5e624..1c257287af0c 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs9100.dtsi
@@ -220,91 +220,91 @@ eud_in: endpoint {
 
 	firmware {
 		scm {
-			compatible = "qcom,scm-sa8775p", "qcom,scm";
+			compatible = "qcom,scm-qcs9100", "qcom,scm";
 			memory-region = <&tz_ffi_mem>;
 		};
 	};
 
 	aggre1_noc: interconnect-aggre1-noc {
-		compatible = "qcom,sa8775p-aggre1-noc";
+		compatible = "qcom,qcs9100-aggre1-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	aggre2_noc: interconnect-aggre2-noc {
-		compatible = "qcom,sa8775p-aggre2-noc";
+		compatible = "qcom,qcs9100-aggre2-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	clk_virt: interconnect-clk-virt {
-		compatible = "qcom,sa8775p-clk-virt";
+		compatible = "qcom,qcs9100-clk-virt";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	config_noc: interconnect-config-noc {
-		compatible = "qcom,sa8775p-config-noc";
+		compatible = "qcom,qcs9100-config-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	dc_noc: interconnect-dc-noc {
-		compatible = "qcom,sa8775p-dc-noc";
+		compatible = "qcom,qcs9100-dc-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	gem_noc: interconnect-gem-noc {
-		compatible = "qcom,sa8775p-gem-noc";
+		compatible = "qcom,qcs9100-gem-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	gpdsp_anoc: interconnect-gpdsp-anoc {
-		compatible = "qcom,sa8775p-gpdsp-anoc";
+		compatible = "qcom,qcs9100-gpdsp-anoc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	lpass_ag_noc: interconnect-lpass-ag-noc {
-		compatible = "qcom,sa8775p-lpass-ag-noc";
+		compatible = "qcom,qcs9100-lpass-ag-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	mc_virt: interconnect-mc-virt {
-		compatible = "qcom,sa8775p-mc-virt";
+		compatible = "qcom,qcs9100-mc-virt";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	mmss_noc: interconnect-mmss-noc {
-		compatible = "qcom,sa8775p-mmss-noc";
+		compatible = "qcom,qcs9100-mmss-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	nspa_noc: interconnect-nspa-noc {
-		compatible = "qcom,sa8775p-nspa-noc";
+		compatible = "qcom,qcs9100-nspa-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	nspb_noc: interconnect-nspb-noc {
-		compatible = "qcom,sa8775p-nspb-noc";
+		compatible = "qcom,qcs9100-nspb-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	pcie_anoc: interconnect-pcie-anoc {
-		compatible = "qcom,sa8775p-pcie-anoc";
+		compatible = "qcom,qcs9100-pcie-anoc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
 
 	system_noc: interconnect-system-noc {
-		compatible = "qcom,sa8775p-system-noc";
+		compatible = "qcom,qcs9100-system-noc";
 		#interconnect-cells = <2>;
 		qcom,bcm-voters = <&apps_bcm_voter>;
 	};
@@ -571,7 +571,7 @@ soc: soc@0 {
 		ranges = <0 0 0 0 0x10 0>;
 
 		gcc: clock-controller@100000 {
-			compatible = "qcom,sa8775p-gcc";
+			compatible = "qcom,qcs9100-gcc";
 			reg = <0x0 0x00100000 0x0 0xc7018>;
 			#clock-cells = <1>;
 			#reset-cells = <1>;
@@ -595,7 +595,7 @@ gcc: clock-controller@100000 {
 		};
 
 		ipcc: mailbox@408000 {
-			compatible = "qcom,sa8775p-ipcc", "qcom,ipcc";
+			compatible = "qcom,qcs9100-ipcc", "qcom,ipcc";
 			reg = <0x0 0x00408000 0x0 0x1000>;
 			interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
 			interrupt-controller;
@@ -1593,12 +1593,12 @@ &config_noc SLAVE_QUP_3 QCOM_ICC_TAG_ALWAYS>,
 		};
 
 		rng: rng@10d2000 {
-			compatible = "qcom,sa8775p-trng", "qcom,trng";
+			compatible = "qcom,qcs9100-trng", "qcom,trng";
 			reg = <0 0x010d2000 0 0x1000>;
 		};
 
 		ufs_mem_hc: ufs@1d84000 {
-			compatible = "qcom,sa8775p-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
+			compatible = "qcom,qcs9100-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
 			reg = <0x0 0x01d84000 0x0 0x3000>;
 			interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
 			phys = <&ufs_mem_phy>;
@@ -1640,7 +1640,7 @@ ufs_mem_hc: ufs@1d84000 {
 		};
 
 		ufs_mem_phy: phy@1d87000 {
-			compatible = "qcom,sa8775p-qmp-ufs-phy";
+			compatible = "qcom,qcs9100-qmp-ufs-phy";
 			reg = <0x0 0x01d87000 0x0 0xe10>;
 			/*
 			 * Yes, GCC_EDP_REF_CLKREF_EN is correct in qref. It
@@ -1658,7 +1658,7 @@ ufs_mem_phy: phy@1d87000 {
 		};
 
 		ice: crypto@1d88000 {
-			compatible = "qcom,sa8775p-inline-crypto-engine",
+			compatible = "qcom,qcs9100-inline-crypto-engine",
 				     "qcom,inline-crypto-engine";
 			reg = <0x0 0x01d88000 0x0 0x8000>;
 			clocks = <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
@@ -2578,7 +2578,7 @@ apss_tpdm2_out: endpoint {
 		};
 
 		usb_0_hsphy: phy@88e4000 {
-			compatible = "qcom,sa8775p-usb-hs-phy",
+			compatible = "qcom,qcs9100-usb-hs-phy",
 				     "qcom,usb-snps-hs-5nm-phy";
 			reg = <0 0x088e4000 0 0x120>;
 			clocks = <&rpmhcc RPMH_CXO_CLK>;
@@ -2591,7 +2591,7 @@ usb_0_hsphy: phy@88e4000 {
 		};
 
 		usb_0_qmpphy: phy@88e8000 {
-			compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
+			compatible = "qcom,qcs9100-qmp-usb3-uni-phy";
 			reg = <0 0x088e8000 0 0x2000>;
 
 			clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
@@ -2615,7 +2615,7 @@ usb_0_qmpphy: phy@88e8000 {
 		};
 
 		usb_0: usb@a6f8800 {
-			compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
+			compatible = "qcom,qcs9100-dwc3", "qcom,dwc3";
 			reg = <0 0x0a6f8800 0 0x400>;
 			#address-cells = <2>;
 			#size-cells = <2>;
@@ -2667,7 +2667,7 @@ usb_0_dwc3: usb@a600000 {
 		};
 
 		usb_1_hsphy: phy@88e6000 {
-			compatible = "qcom,sa8775p-usb-hs-phy",
+			compatible = "qcom,qcs9100-usb-hs-phy",
 				     "qcom,usb-snps-hs-5nm-phy";
 			reg = <0 0x088e6000 0 0x120>;
 			clocks = <&gcc GCC_USB_CLKREF_EN>;
@@ -2680,7 +2680,7 @@ usb_1_hsphy: phy@88e6000 {
 		};
 
 		usb_1_qmpphy: phy@88ea000 {
-			compatible = "qcom,sa8775p-qmp-usb3-uni-phy";
+			compatible = "qcom,qcs9100-qmp-usb3-uni-phy";
 			reg = <0 0x088ea000 0 0x2000>;
 
 			clocks = <&gcc GCC_USB3_SEC_PHY_AUX_CLK>,
@@ -2704,7 +2704,7 @@ usb_1_qmpphy: phy@88ea000 {
 		};
 
 		usb_1: usb@a8f8800 {
-			compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
+			compatible = "qcom,qcs9100-dwc3", "qcom,dwc3";
 			reg = <0 0x0a8f8800 0 0x400>;
 			#address-cells = <2>;
 			#size-cells = <2>;
@@ -2756,7 +2756,7 @@ usb_1_dwc3: usb@a800000 {
 		};
 
 		usb_2_hsphy: phy@88e7000 {
-			compatible = "qcom,sa8775p-usb-hs-phy",
+			compatible = "qcom,qcs9100-usb-hs-phy",
 				     "qcom,usb-snps-hs-5nm-phy";
 			reg = <0 0x088e7000 0 0x120>;
 			clocks = <&gcc GCC_USB_CLKREF_EN>;
@@ -2769,7 +2769,7 @@ usb_2_hsphy: phy@88e7000 {
 		};
 
 		usb_2: usb@a4f8800 {
-			compatible = "qcom,sa8775p-dwc3", "qcom,dwc3";
+			compatible = "qcom,qcs9100-dwc3", "qcom,dwc3";
 			reg = <0 0x0a4f8800 0 0x400>;
 			#address-cells = <2>;
 			#size-cells = <2>;
@@ -2825,7 +2825,7 @@ tcsr_mutex: hwlock@1f40000 {
 		};
 
 		gpucc: clock-controller@3d90000 {
-			compatible = "qcom,sa8775p-gpucc";
+			compatible = "qcom,qcs9100-gpucc";
 			reg = <0x0 0x03d90000 0x0 0xa000>;
 			clocks = <&rpmhcc RPMH_CXO_CLK>,
 				 <&gcc GCC_GPU_GPLL0_CLK_SRC>,
@@ -2839,7 +2839,7 @@ gpucc: clock-controller@3d90000 {
 		};
 
 		adreno_smmu: iommu@3da0000 {
-			compatible = "qcom,sa8775p-smmu-500", "qcom,adreno-smmu",
+			compatible = "qcom,qcs9100-smmu-500", "qcom,adreno-smmu",
 				     "qcom,smmu-500", "arm,mmu-500";
 			reg = <0x0 0x03da0000 0x0 0x20000>;
 			#iommu-cells = <2>;
@@ -2875,7 +2875,7 @@ adreno_smmu: iommu@3da0000 {
 		};
 
 		serdes0: phy@8901000 {
-			compatible = "qcom,sa8775p-dwmac-sgmii-phy";
+			compatible = "qcom,qcs9100-dwmac-sgmii-phy";
 			reg = <0x0 0x08901000 0x0 0xe10>;
 			clocks = <&gcc GCC_SGMI_CLKREF_EN>;
 			clock-names = "sgmi_ref";
@@ -2884,7 +2884,7 @@ serdes0: phy@8901000 {
 		};
 
 		serdes1: phy@8902000 {
-			compatible = "qcom,sa8775p-dwmac-sgmii-phy";
+			compatible = "qcom,qcs9100-dwmac-sgmii-phy";
 			reg = <0x0 0x08902000 0x0 0xe10>;
 			clocks = <&gcc GCC_SGMI_CLKREF_EN>;
 			clock-names = "sgmi_ref";
@@ -2893,7 +2893,7 @@ serdes1: phy@8902000 {
 		};
 
 		llcc: system-cache-controller@9200000 {
-			compatible = "qcom,sa8775p-llcc";
+			compatible = "qcom,qcs9100-llcc";
 			reg = <0x0 0x09200000 0x0 0x80000>,
 			      <0x0 0x09300000 0x0 0x80000>,
 			      <0x0 0x09400000 0x0 0x80000>,
@@ -2912,7 +2912,7 @@ llcc: system-cache-controller@9200000 {
 		};
 
 		pdc: interrupt-controller@b220000 {
-			compatible = "qcom,sa8775p-pdc", "qcom,pdc";
+			compatible = "qcom,qcs9100-pdc", "qcom,pdc";
 			reg = <0x0 0x0b220000 0x0 0x30000>,
 			      <0x0 0x17c000f0 0x0 0x64>;
 			qcom,pdc-ranges = <0 480 40>,
@@ -2959,7 +2959,7 @@ pdc: interrupt-controller@b220000 {
 		};
 
 		tsens2: thermal-sensor@c251000 {
-			compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
+			compatible = "qcom,qcs9100-tsens", "qcom,tsens-v2";
 			reg = <0x0 0x0c251000 0x0 0x1ff>,
 			      <0x0 0x0c224000 0x0 0x8>;
 			interrupts = <GIC_SPI 572 IRQ_TYPE_LEVEL_HIGH>,
@@ -2970,7 +2970,7 @@ tsens2: thermal-sensor@c251000 {
 		};
 
 		tsens3: thermal-sensor@c252000 {
-			compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
+			compatible = "qcom,qcs9100-tsens", "qcom,tsens-v2";
 			reg = <0x0 0x0c252000 0x0 0x1ff>,
 			      <0x0 0x0c225000 0x0 0x8>;
 			interrupts = <GIC_SPI 573 IRQ_TYPE_LEVEL_HIGH>,
@@ -2981,7 +2981,7 @@ tsens3: thermal-sensor@c252000 {
 		};
 
 		tsens0: thermal-sensor@c263000 {
-			compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
+			compatible = "qcom,qcs9100-tsens", "qcom,tsens-v2";
 			reg = <0x0 0x0c263000 0x0 0x1ff>,
 			      <0x0 0x0c222000 0x0 0x8>;
 			interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
@@ -2992,7 +2992,7 @@ tsens0: thermal-sensor@c263000 {
 		};
 
 		tsens1: thermal-sensor@c265000 {
-			compatible = "qcom,sa8775p-tsens", "qcom,tsens-v2";
+			compatible = "qcom,qcs9100-tsens", "qcom,tsens-v2";
 			reg = <0x0 0x0c265000 0x0 0x1ff>,
 			      <0x0 0x0c223000 0x0 0x8>;
 			interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>,
@@ -3003,7 +3003,7 @@ tsens1: thermal-sensor@c265000 {
 		};
 
 		aoss_qmp: power-management@c300000 {
-			compatible = "qcom,sa8775p-aoss-qmp", "qcom,aoss-qmp";
+			compatible = "qcom,qcs9100-aoss-qmp", "qcom,aoss-qmp";
 			reg = <0x0 0x0c300000 0x0 0x400>;
 			interrupts-extended = <&ipcc IPCC_CLIENT_AOP
 					       IPCC_MPROC_SIGNAL_GLINK_QMP
@@ -3040,7 +3040,7 @@ spmi_bus: spmi@c440000 {
 		};
 
 		tlmm: pinctrl@f000000 {
-			compatible = "qcom,sa8775p-tlmm";
+			compatible = "qcom,qcs9100-tlmm";
 			reg = <0x0 0x0f000000 0x0 0x1000000>;
 			interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
 			gpio-controller;
@@ -3052,7 +3052,7 @@ tlmm: pinctrl@f000000 {
 		};
 
 		sram: sram@146d8000 {
-			compatible = "qcom,sa8775p-imem", "syscon", "simple-mfd";
+			compatible = "qcom,qcs9100-imem", "syscon", "simple-mfd";
 			reg = <0x0 0x146d8000 0x0 0x1000>;
 			ranges = <0x0 0x0 0x146d8000 0x1000>;
 
@@ -3066,7 +3066,7 @@ pil-reloc@94c {
 		};
 
 		apps_smmu: iommu@15000000 {
-			compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500";
+			compatible = "qcom,qcs9100-smmu-500", "qcom,smmu-500", "arm,mmu-500";
 			reg = <0x0 0x15000000 0x0 0x100000>;
 			#iommu-cells = <2>;
 			#global-interrupts = <2>;
@@ -3204,7 +3204,7 @@ apps_smmu: iommu@15000000 {
 		};
 
 		pcie_smmu: iommu@15200000 {
-			compatible = "qcom,sa8775p-smmu-500", "qcom,smmu-500", "arm,mmu-500";
+			compatible = "qcom,qcs9100-smmu-500", "qcom,smmu-500", "arm,mmu-500";
 			reg = <0x0 0x15200000 0x0 0x80000>;
 			#iommu-cells = <2>;
 			#global-interrupts = <2>;
@@ -3289,7 +3289,7 @@ intc: interrupt-controller@17a00000 {
 		};
 
 		watchdog@17c10000 {
-			compatible = "qcom,apss-wdt-sa8775p", "qcom,kpss-wdt";
+			compatible = "qcom,apss-wdt-qcs9100", "qcom,kpss-wdt";
 			reg = <0x0 0x17c10000 0x0 0x1000>;
 			clocks = <&sleep_clk>;
 			interrupts = <GIC_SPI 0 IRQ_TYPE_EDGE_RISING>;
@@ -3375,14 +3375,14 @@ apps_bcm_voter: bcm-voter {
 			};
 
 			rpmhcc: clock-controller {
-				compatible = "qcom,sa8775p-rpmh-clk";
+				compatible = "qcom,qcs9100-rpmh-clk";
 				#clock-cells = <1>;
 				clock-names = "xo";
 				clocks = <&xo_board_clk>;
 			};
 
 			rpmhpd: power-controller {
-				compatible = "qcom,sa8775p-rpmhpd";
+				compatible = "qcom,qcs9100-rpmhpd";
 				#power-domain-cells = <1>;
 				operating-points-v2 = <&rpmhpd_opp_table>;
 
@@ -3433,7 +3433,7 @@ rpmhpd_opp_turbo_l1: opp-9 {
 		};
 
 		cpufreq_hw: cpufreq@18591000 {
-			compatible = "qcom,sa8775p-cpufreq-epss",
+			compatible = "qcom,qcs9100-cpufreq-epss",
 				     "qcom,cpufreq-epss";
 			reg = <0x0 0x18591000 0x0 0x1000>,
 			      <0x0 0x18593000 0x0 0x1000>;
@@ -3446,7 +3446,7 @@ cpufreq_hw: cpufreq@18591000 {
 		};
 
 		ethernet1: ethernet@23000000 {
-			compatible = "qcom,sa8775p-ethqos";
+			compatible = "qcom,qcs9100-ethqos";
 			reg = <0x0 0x23000000 0x0 0x10000>,
 			      <0x0 0x23016000 0x0 0x100>;
 			reg-names = "stmmaceth", "rgmii";
@@ -3481,7 +3481,7 @@ ethernet1: ethernet@23000000 {
 		};
 
 		ethernet0: ethernet@23040000 {
-			compatible = "qcom,sa8775p-ethqos";
+			compatible = "qcom,qcs9100-ethqos";
 			reg = <0x0 0x23040000 0x0 0x10000>,
 			      <0x0 0x23056000 0x0 0x100>;
 			reg-names = "stmmaceth", "rgmii";
@@ -4495,7 +4495,7 @@ arch_timer: timer {
 	};
 
 	pcie0: pcie@1c00000 {
-		compatible = "qcom,pcie-sa8775p";
+		compatible = "qcom,pcie-qcs9100";
 		reg = <0x0 0x01c00000 0x0 0x3000>,
 		      <0x0 0x40000000 0x0 0xf20>,
 		      <0x0 0x40000f20 0x0 0xa8>,
@@ -4576,7 +4576,7 @@ pcie@0 {
 	};
 
 	pcie0_ep: pcie-ep@1c00000 {
-		compatible = "qcom,sa8775p-pcie-ep";
+		compatible = "qcom,qcs9100-pcie-ep";
 		reg = <0x0 0x01c00000 0x0 0x3000>,
 		      <0x0 0x40000000 0x0 0xf20>,
 		      <0x0 0x40000f20 0x0 0xa8>,
@@ -4623,7 +4623,7 @@ pcie0_ep: pcie-ep@1c00000 {
 	};
 
 	pcie0_phy: phy@1c04000 {
-		compatible = "qcom,sa8775p-qmp-gen4x2-pcie-phy";
+		compatible = "qcom,qcs9100-qmp-gen4x2-pcie-phy";
 		reg = <0x0 0x1c04000 0x0 0x2000>;
 
 		clocks = <&gcc GCC_PCIE_0_AUX_CLK>,
@@ -4652,7 +4652,7 @@ pcie0_phy: phy@1c04000 {
 	};
 
 	pcie1: pcie@1c10000 {
-		compatible = "qcom,pcie-sa8775p";
+		compatible = "qcom,pcie-qcs9100";
 		reg = <0x0 0x01c10000 0x0 0x3000>,
 		      <0x0 0x60000000 0x0 0xf20>,
 		      <0x0 0x60000f20 0x0 0xa8>,
@@ -4733,7 +4733,7 @@ pcie@0 {
 	};
 
 	pcie1_ep: pcie-ep@1c10000 {
-		compatible = "qcom,sa8775p-pcie-ep";
+		compatible = "qcom,qcs9100-pcie-ep";
 		reg = <0x0 0x01c10000 0x0 0x3000>,
 		      <0x0 0x60000000 0x0 0xf20>,
 		      <0x0 0x60000f20 0x0 0xa8>,
@@ -4780,7 +4780,7 @@ pcie1_ep: pcie-ep@1c10000 {
 	};
 
 	pcie1_phy: phy@1c14000 {
-		compatible = "qcom,sa8775p-qmp-gen4x4-pcie-phy";
+		compatible = "qcom,qcs9100-qmp-gen4x4-pcie-phy";
 		reg = <0x0 0x1c14000 0x0 0x4000>;
 
 		clocks = <&gcc GCC_PCIE_1_AUX_CLK>,
-- 
2.25.1

[PATCH 03/47] arm64: dts: qcom: qcs9100: Introduce QCS9100 PMIC dtsi

[Tengfei Fan]

Introduce QCS9100 PMIC dtsi.
The current QCS9100 PMIC dtsi is directly renamed from the SA8775p PMIC
dtsi. Currently, the QCS9100 platform and SA8775p platform have the same
PMIC requirements. In the future, as the SA8775p platform will
transitions to using SCMI resources, their PMIC requirements will differ.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../boot/dts/qcom/{sa8775p-pmics.dtsi => qcs9100-pmics.dtsi}      | 0
 1 file changed, 0 insertions(+), 0 deletions(-)
 rename arch/arm64/boot/dts/qcom/{sa8775p-pmics.dtsi => qcs9100-pmics.dtsi} (100%)

diff --git a/arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi b/arch/arm64/boot/dts/qcom/qcs9100-pmics.dtsi
similarity index 100%
rename from arch/arm64/boot/dts/qcom/sa8775p-pmics.dtsi
rename to arch/arm64/boot/dts/qcom/qcs9100-pmics.dtsi
-- 
2.25.1

[PATCH 04/47] arm64: dts: qcom: qcs9100: Add QCS9100 RIDE board dts

[Tengfei Fan]

Add support for the QCS9100 RIDE board dts. The current QCS9100 RIDE
board dts is directly renamed from the SA8775p RIDE board dts.
The difference between the current QCS9100 RIDE board and the SA8775p
RIDE board lies solely in the replacement of the SA8775p SoC with the
QCS9100 SoC, all other board resources remain the same.
The following items have been updated:
  - use QCS9100-related compatible names for this board dts.
  - replace the inclusion of sa8775p.dtsi with qcs9100.dtsi.
  - replace the inclusion of sa8775p-pmics.dtsi with qcs9100-pmics.dtsi

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 arch/arm64/boot/dts/qcom/Makefile                         | 2 +-
 .../boot/dts/qcom/{sa8775p-ride.dts => qcs9100-ride.dts}  | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)
 rename arch/arm64/boot/dts/qcom/{sa8775p-ride.dts => qcs9100-ride.dts} (99%)

diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
index 5576c7d6ea06..a7a3792b0691 100644
--- a/arch/arm64/boot/dts/qcom/Makefile
+++ b/arch/arm64/boot/dts/qcom/Makefile
@@ -103,6 +103,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-rb3gen2.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qcs8550-aim300-aiot.dtb
+dtb-$(CONFIG_ARCH_QCOM)	+= qcs9100-ride.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qdu1000-idp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qrb2210-rb1.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= qrb4210-rb2.dtb
@@ -112,7 +113,6 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qru1000-idp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sa8155p-adp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sa8295p-adp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sa8540p-ride.dtb
-dtb-$(CONFIG_ARCH_QCOM)	+= sa8775p-ride.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-acer-aspire1.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-idp.dtb
 dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-coachz-r1.dtb
diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts
similarity index 99%
rename from arch/arm64/boot/dts/qcom/sa8775p-ride.dts
rename to arch/arm64/boot/dts/qcom/qcs9100-ride.dts
index 26ad05bd3b3f..2415d34b8aa5 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts
@@ -8,12 +8,12 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
 
-#include "sa8775p.dtsi"
-#include "sa8775p-pmics.dtsi"
+#include "qcs9100.dtsi"
+#include "qcs9100-pmics.dtsi"
 
 / {
-	model = "Qualcomm SA8775P Ride";
-	compatible = "qcom,sa8775p-ride", "qcom,sa8775p";
+	model = "Qualcomm QCS9100 Ride";
+	compatible = "qcom,qcs9100-ride", "qcom,qcs9100";
 
 	aliases {
 		ethernet0 = &ethernet0;
-- 
2.25.1

[PATCH 05/47] dt-bindings: firmware: qcom,scm: document SCM on QCS9100 SoC

[Tengfei Fan]

Document scm compatible for QCS9100 SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
index 2cc83771d8e7..3596ae0e0610 100644
--- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
+++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
@@ -42,6 +42,7 @@ properties:
           - qcom,scm-msm8996
           - qcom,scm-msm8998
           - qcom,scm-qcm2290
+          - qcom,scm-qcs9100
           - qcom,scm-qdu1000
           - qcom,scm-sa8775p
           - qcom,scm-sc7180
-- 
2.25.1

[PATCH 06/47] dt-bindings: interconnect: qcom: document the interconnect compatibles for QCS9100

[Tengfei Fan]

Document for the RPMh interconnect compatibles on Qualcomm QCS9100
platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../bindings/interconnect/qcom,sa8775p-rpmh.yaml   | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml
index 2e0c0bc7a376..748fe2084ad8 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml
@@ -18,6 +18,20 @@ description: |
 properties:
   compatible:
     enum:
+      - qcom,qcs9100-aggre1-noc
+      - qcom,qcs9100-aggre2-noc
+      - qcom,qcs9100-clk-virt
+      - qcom,qcs9100-config-noc
+      - qcom,qcs9100-dc-noc
+      - qcom,qcs9100-gem-noc
+      - qcom,qcs9100-gpdsp-anoc
+      - qcom,qcs9100-lpass-ag-noc
+      - qcom,qcs9100-mc-virt
+      - qcom,qcs9100-mmss-noc
+      - qcom,qcs9100-nspa-noc
+      - qcom,qcs9100-nspb-noc
+      - qcom,qcs9100-pcie-anoc
+      - qcom,qcs9100-system-noc
       - qcom,sa8775p-aggre1-noc
       - qcom,sa8775p-aggre2-noc
       - qcom,sa8775p-clk-virt
-- 
2.25.1

[PATCH 07/47] dt-bindings: clock: document QCS9100 GCC compatible

[Tengfei Fan]

Document QCS9100 GCC compatible.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../devicetree/bindings/clock/qcom,sa8775p-gcc.yaml          | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml
index addbd323fa6d..0ca77054e527 100644
--- a/Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,sa8775p-gcc.yaml
@@ -17,7 +17,10 @@ description: |
 
 properties:
   compatible:
-    const: qcom,sa8775p-gcc
+    items:
+      - enum:
+          - qcom,qcs9100-gcc
+          - qcom,sa8775p-gcc
 
   clocks:
     items:
-- 
2.25.1

[PATCH 08/47] dt-bindings: mailbox: qcom-ipcc: Document the QCS9100 IPCC

[Tengfei Fan]

Document the Inter-Processor Communication Controller on the QCS9100
Platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
index 05e4e1d51713..916c47fbc238 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
+++ b/Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
@@ -24,6 +24,7 @@ properties:
   compatible:
     items:
       - enum:
+          - qcom,qcs9100-ipcc
           - qcom,qdu1000-ipcc
           - qcom,sa8775p-ipcc
           - qcom,sc7280-ipcc
-- 
2.25.1

[PATCH 09/47] dt-bindings: phy: Add QMP UFS PHY comptible for QCS9100

[Tengfei Fan]

Document the QMP UFS PHY compatible for QCS9100.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml      | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
index f9cfbd0b2de6..f5c321a4a2f9 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-ufs-phy.yaml
@@ -18,6 +18,7 @@ properties:
     enum:
       - qcom,msm8996-qmp-ufs-phy
       - qcom,msm8998-qmp-ufs-phy
+      - qcom,qcs9100-qmp-ufs-phy
       - qcom,sa8775p-qmp-ufs-phy
       - qcom,sc7180-qmp-ufs-phy
       - qcom,sc7280-qmp-ufs-phy
@@ -85,6 +86,7 @@ allOf:
           contains:
             enum:
               - qcom,msm8998-qmp-ufs-phy
+              - qcom,qcs9100-qmp-ufs-phy
               - qcom,sa8775p-qmp-ufs-phy
               - qcom,sc7180-qmp-ufs-phy
               - qcom,sc7280-qmp-ufs-phy
-- 
2.25.1

[PATCH 10/47] dt-bindings: crypto: ice: Document QCS9100 inline crypto engine

[Tengfei Fan]

Document the compatible used for the inline crypto engine found on
QCS9100.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml    | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
index 0304f074cf08..ad0944e05025 100644
--- a/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom,inline-crypto-engine.yaml
@@ -13,6 +13,7 @@ properties:
   compatible:
     items:
       - enum:
+          - qcom,qcs9100-inline-crypto-engine
           - qcom,sa8775p-inline-crypto-engine
           - qcom,sc7180-inline-crypto-engine
           - qcom,sc7280-inline-crypto-engine
-- 
2.25.1

[PATCH 11/47] dt-bindings: crypto: qcom,prng: document QCS9100

[Tengfei Fan]

Document QCS9100 compatible for the True Random Number Generator.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/crypto/qcom,prng.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/crypto/qcom,prng.yaml b/Documentation/devicetree/bindings/crypto/qcom,prng.yaml
index 89c88004b41b..e97226eb7a50 100644
--- a/Documentation/devicetree/bindings/crypto/qcom,prng.yaml
+++ b/Documentation/devicetree/bindings/crypto/qcom,prng.yaml
@@ -17,6 +17,7 @@ properties:
           - qcom,prng-ee  # 8996 and later using EE
       - items:
           - enum:
+              - qcom,qcs9100-trng
               - qcom,sa8775p-trng
               - qcom,sc7280-trng
               - qcom,sm8450-trng
-- 
2.25.1

[PATCH 12/47] dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for QCS9100

[Tengfei Fan]

Document the compatible string for USB phy found in Qualcomm QCS9100
SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml          | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml b/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml
index 519c2b403f66..cd0a723590f0 100644
--- a/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,usb-snps-femto-v2.yaml
@@ -17,6 +17,7 @@ properties:
     oneOf:
       - items:
           - enum:
+              - qcom,qcs9100-usb-hs-phy
               - qcom,sa8775p-usb-hs-phy
               - qcom,sc8280xp-usb-hs-phy
           - const: qcom,usb-snps-hs-5nm-phy
-- 
2.25.1

[PATCH 13/47] dt-bindings: ufs: qcom: document QCS9100 UFS

[Tengfei Fan]

Document the compatible string for the UFS found on QCS9100.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/ufs/qcom,ufs.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
index 25a5edeea164..baee567fbcd6 100644
--- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
+++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml
@@ -26,6 +26,7 @@ properties:
           - qcom,msm8994-ufshc
           - qcom,msm8996-ufshc
           - qcom,msm8998-ufshc
+          - qcom,qcs9100-ufshc
           - qcom,sa8775p-ufshc
           - qcom,sc7180-ufshc
           - qcom,sc7280-ufshc
@@ -146,6 +147,7 @@ allOf:
           contains:
             enum:
               - qcom,msm8998-ufshc
+              - qcom,qcs9100-ufshc
               - qcom,sa8775p-ufshc
               - qcom,sc7280-ufshc
               - qcom,sc8180x-ufshc
-- 
2.25.1

[PATCH 14/47] dt-bindings: phy: qcom,qmp-usb: Add QCS9100 USB3 PHY

[Tengfei Fan]

Add dt-bindings for USB3 PHY found on Qualcomm QCS9100.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml           | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
index 5755245ecfd6..8c1bc416646c 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
@@ -20,6 +20,7 @@ properties:
       - qcom,ipq8074-qmp-usb3-phy
       - qcom,ipq9574-qmp-usb3-phy
       - qcom,msm8996-qmp-usb3-phy
+      - qcom,qcs9100-qmp-usb3-uni-phy
       - com,qdu1000-qmp-usb3-uni-phy
       - qcom,sa8775p-qmp-usb3-uni-phy
       - qcom,sc8180x-qmp-usb3-uni-phy
@@ -111,6 +112,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,qcs9100-qmp-usb3-uni-phy
               - qcom,qdu1000-qmp-usb3-uni-phy
               - qcom,sa8775p-qmp-usb3-uni-phy
               - qcom,sc8180x-qmp-usb3-uni-phy
@@ -153,6 +155,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,qcs9100-qmp-usb3-uni-phy
               - qcom,sa8775p-qmp-usb3-uni-phy
               - qcom,sc8180x-qmp-usb3-uni-phy
               - qcom,sc8280xp-qmp-usb3-uni-phy
-- 
2.25.1

[PATCH 15/47] dt-bindings: usb: dwc3: Add QCS9100 compatible

[Tengfei Fan]

Document the QCS9100 dwc3 compatible.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
index efde47a5b145..07b0b6530b78 100644
--- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
+++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
@@ -26,6 +26,7 @@ properties:
           - qcom,msm8998-dwc3
           - qcom,qcm2290-dwc3
           - qcom,qcs404-dwc3
+          - qcom,qcs9100-dwc3
           - qcom,qdu1000-dwc3
           - qcom,sa8775p-dwc3
           - qcom,sc7180-dwc3
@@ -199,6 +200,7 @@ allOf:
               - qcom,msm8953-dwc3
               - qcom,msm8996-dwc3
               - qcom,msm8998-dwc3
+              - qcom,qcs9100-dwc3
               - qcom,sa8775p-dwc3
               - qcom,sc7180-dwc3
               - qcom,sc7280-dwc3
@@ -448,6 +450,7 @@ allOf:
               - qcom,ipq4019-dwc3
               - qcom,ipq8064-dwc3
               - qcom,msm8994-dwc3
+              - qcom,qcs9100-dwc3
               - qcom,qdu1000-dwc3
               - qcom,sa8775p-dwc3
               - qcom,sc7180-dwc3
-- 
2.25.1

[PATCH 16/47] dt-bindings: clock: qcom: describe the GPUCC clock for QCS9100

[Tengfei Fan]

Add the compatible for the Qualcomm Graphics Clock control module present
on QCS9100 platforms. It matches the generic QCom GPUCC description. Add
device-specific DT bindings defines as well.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
index 0858fd635282..33eb62ec4745 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
@@ -27,6 +27,7 @@ description: |
 properties:
   compatible:
     enum:
+      - qcom,qcs9100-gpucc
       - qcom,sdm845-gpucc
       - qcom,sa8775p-gpucc
       - qcom,sc7180-gpucc
-- 
2.25.1

[PATCH 17/47] dt-bindings: arm-smmu: Document QCS9100 GPU SMMU

[Tengfei Fan]

Document the GPU SMMU found on the QCS9100 platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 5c130cf06a21..82b7e1d40ce0 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -36,6 +36,7 @@ properties:
         items:
           - enum:
               - qcom,qcm2290-smmu-500
+              - qcom,qcs9100-smmu-500
               - qcom,qdu1000-smmu-500
               - qcom,sa8775p-smmu-500
               - qcom,sc7180-smmu-500
@@ -84,6 +85,7 @@ properties:
         items:
           - enum:
               - qcom,qcm2290-smmu-500
+              - qcom,qcs9100-smmu-500
               - qcom,sa8775p-smmu-500
               - qcom,sc7280-smmu-500
               - qcom,sc8280xp-smmu-500
@@ -385,6 +387,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,qcs9100-smmu-500
               - qcom,sa8775p-smmu-500
               - qcom,sc7280-smmu-500
               - qcom,sc8280xp-smmu-500
-- 
2.25.1

[PATCH 18/47] dt-bindings: phy: describe the Qualcomm SGMII PHY for QCS9100

[Tengfei Fan]

Document the Qualcomm SGMII PHY for the QCS9100 platforms.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml           | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml
index b9107759b2a5..74ec4579c0d6 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sa8775p-dwmac-sgmii-phy.yaml
@@ -15,7 +15,10 @@ description:
 
 properties:
   compatible:
-    const: qcom,sa8775p-dwmac-sgmii-phy
+    items:
+      - enum:
+          - qcom,qcs9100-dwmac-sgmii-phy
+          - qcom,sa8775p-dwmac-sgmii-phy
 
   reg:
     items:
-- 
2.25.1

[PATCH 19/47] dt-bindings: cache: qcom,llcc: Add QCS9100 description

[Tengfei Fan]

Add the cache controller compatible and register region descriptions for
QCS9100 platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/cache/qcom,llcc.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
index 68ea5f70b75f..a38c8b99099e 100644
--- a/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
+++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml
@@ -21,6 +21,7 @@ properties:
   compatible:
     enum:
       - qcom,qdu1000-llcc
+      - qcom,qcs9100-llcc
       - qcom,sa8775p-llcc
       - qcom,sc7180-llcc
       - qcom,sc7280-llcc
@@ -85,6 +86,7 @@ allOf:
         compatible:
           contains:
             enum:
+              - qcom,qcs9100-llcc
               - qcom,sa8775p-llcc
     then:
       properties:
-- 
2.25.1

[PATCH 20/47] dt-bindings: interrupt-controller: qcom,pdc: document pdc on QCS9100

[Tengfei Fan]

The QCS9100 SoC includes a PDC, document it.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml       | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
index 985fa10abb99..41fbfce838fa 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
@@ -26,6 +26,7 @@ properties:
   compatible:
     items:
       - enum:
+          - qcom,qcs9100-pdc
           - qcom,qdu1000-pdc
           - qcom,sa8775p-pdc
           - qcom,sc7180-pdc
-- 
2.25.1

[PATCH 21/47] dt-bindings: thermal: qcom-tsens: document the QCS9100 Temperature Sensor

[Tengfei Fan]

Document the Temperature Sensor (TSENS) on the QCS9100 Platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/thermal/qcom-tsens.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
index 99d9c526c0b6..ace2cf1975c4 100644
--- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
+++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
@@ -51,6 +51,7 @@ properties:
               - qcom,msm8996-tsens
               - qcom,msm8998-tsens
               - qcom,qcm2290-tsens
+              - qcom,qcs9100-tsens
               - qcom,sa8775p-tsens
               - qcom,sc7180-tsens
               - qcom,sc7280-tsens
-- 
2.25.1

[PATCH 22/47] dt-bindings: soc: qcom,aoss-qmp: Document the QCS9100 AOSS channel

[Tengfei Fan]

Document the Always-On Subsystem side channel on the QCS9100 Platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
index 7afdb60edb22..80e1a8b43586 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
@@ -25,6 +25,7 @@ properties:
   compatible:
     items:
       - enum:
+          - qcom,qcs9100-aoss-qmp
           - qcom,qdu1000-aoss-qmp
           - qcom,sa8775p-aoss-qmp
           - qcom,sc7180-aoss-qmp
-- 
2.25.1

[PATCH 23/47] dt-bindings: pinctrl: add qcs9100-tlmm compatible

[Tengfei Fan]

Add qcs9100-tlmm compatible for QCS9100 SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 .../devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml       | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml
index e9abbf2c0689..1bdec08efc4a 100644
--- a/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/qcom,sa8775p-tlmm.yaml
@@ -17,7 +17,10 @@ allOf:
 
 properties:
   compatible:
-    const: qcom,sa8775p-tlmm
+    items:
+      - enum:
+          - qcom,qcs9100-tlmm
+          - qcom,sa8775p-tlmm
 
   reg:
     maxItems: 1
-- 
2.25.1

[PATCH 24/47] dt-bindings: soc: qcom: add qcom,qcs9100-imem compatible

[Tengfei Fan]

Add qcom,qcs9100-imem compatible name support.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/sram/qcom,imem.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/sram/qcom,imem.yaml b/Documentation/devicetree/bindings/sram/qcom,imem.yaml
index faef3d6e0a94..e45337a21232 100644
--- a/Documentation/devicetree/bindings/sram/qcom,imem.yaml
+++ b/Documentation/devicetree/bindings/sram/qcom,imem.yaml
@@ -21,6 +21,7 @@ properties:
           - qcom,msm8226-imem
           - qcom,msm8974-imem
           - qcom,qcs404-imem
+          - qcom,qcs9100-imem
           - qcom,qdu1000-imem
           - qcom,sa8775p-imem
           - qcom,sc7180-imem
-- 
2.25.1

[PATCH 25/47] dt-bindings: watchdog: qcom-wdt: document QCS9100

[Tengfei Fan]

Document the QCS9100 watchdog compatible.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
index 47587971fb0b..5a78816aeece 100644
--- a/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
+++ b/Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml
@@ -26,6 +26,7 @@ properties:
               - qcom,apss-wdt-msm8994
               - qcom,apss-wdt-qcm2290
               - qcom,apss-wdt-qcs404
+              - qcom,apss-wdt-qcs9100
               - qcom,apss-wdt-sa8775p
               - qcom,apss-wdt-sc7180
               - qcom,apss-wdt-sc7280
-- 
2.25.1

[PATCH 26/47] dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for QCS9100

[Tengfei Fan]

Add bindings and update documentation for clock rpmh driver on QCS9100
SoC.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
index ca857942ed6c..63e4b8f8e571 100644
--- a/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml
@@ -17,6 +17,7 @@ description: |
 properties:
   compatible:
     enum:
+      - qcom,qcs9100-rpmh-clk
       - qcom,qdu1000-rpmh-clk
       - qcom,sa8775p-rpmh-clk
       - qcom,sc7180-rpmh-clk
-- 
2.25.1

[PATCH 27/47] dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCS9100 compatibles

[Tengfei Fan]

Add compatible for EPSS CPUFREQ-HW on QCS9100.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
index 1e9797f96410..02875e7a44f9 100644
--- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
+++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml
@@ -33,6 +33,7 @@ properties:
       - description: v2 of CPUFREQ HW (EPSS)
         items:
           - enum:
+              - qcom,qcs9100-cpufreq-epss
               - qcom,qdu1000-cpufreq-epss
               - qcom,sa8775p-cpufreq-epss
               - qcom,sc7280-cpufreq-epss
-- 
2.25.1

[PATCH 28/47] dt-bindings: power: qcom,rpmpd: document the QCS9100 RPMh Power Domains

[Tengfei Fan]

Document the RPMh Power Domains on the QCS9100 Platform.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/power/qcom,rpmpd.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
index 929b7ef9c1bc..0e5aaca38994 100644
--- a/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
+++ b/Documentation/devicetree/bindings/power/qcom,rpmpd.yaml
@@ -32,6 +32,7 @@ properties:
           - qcom,msm8998-rpmpd
           - qcom,qcm2290-rpmpd
           - qcom,qcs404-rpmpd
+          - qcom,qcs9100-rpmhpd
           - qcom,qdu1000-rpmhpd
           - qcom,qm215-rpmpd
           - qcom,sa8155p-rpmhpd
-- 
2.25.1

[PATCH 29/47] dt-bindings: net: qcom,ethqos: add description for qcs9100

[Tengfei Fan]

Add the compatible for the MAC controller on qcs9100 platforms. This MAC
works with a single interrupt so add minItems to the interrupts property.
The fourth clock's name is different here so change it. Enable relevant
PHY properties. Add the relevant compatibles to the binding document for
snps,dwmac as well.

Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
---
 Documentation/devicetree/bindings/net/qcom,ethqos.yaml | 1 +
 Documentation/devicetree/bindings/net/snps,dwmac.yaml  | 3 +++
 2 files changed, 4 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
index 6672327358bc..8ab11e00668c 100644
--- a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
+++ b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
@@ -20,6 +20,7 @@ properties:
   compatible:
     enum:
       - qcom,qcs404-ethqos
+      - qcom,qcs9100-ethqos
       - qcom,sa8775p-ethqos
       - qcom,sc8280xp-ethqos
       - qcom,sm8150-ethqos
diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
index 3bab4e1f3fbf..269c21779396 100644
--- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
@@ -67,6 +67,7 @@ properties:
         - loongson,ls2k-dwmac
         - loongson,ls7a-dwmac
         - qcom,qcs404-ethqos
+        - qcom,qcs9100-ethqos
         - qcom,sa8775p-ethqos
         - qcom,sc8280xp-ethqos
         - qcom,sm8150-ethqos
@@ -582,6 +583,7 @@ allOf:
               - ingenic,x1600-mac
               - ingenic,x1830-mac
               - ingenic,x2000-mac
+              - qcom,qcs9100-ethqos
               - qcom,sa8775p-ethqos
               - qcom,sc8280xp-ethqos
               - snps,dwmac-3.50a
@@ -639,6 +641,7 @@ allOf:
               - ingenic,x1830-mac
               - ingenic,x2000-mac
               - qcom,qcs404-ethqos
+              - qcom,qcs9100-ethqos
               - qcom,sa8775p-ethqos
               - qcom,sc8280xp-ethqos
               - qcom,sm8150-ethqos
-- 
2.25.1

Re: [PATCH 00/47] arm64: qcom: dts: add QCS9100 support

[patchwork-bot+netdevbpf]

Hello:

This series was applied to netdev/net-next.git (main)
by Jakub Kicinski <kuba@kernel.org>:

On Wed, 3 Jul 2024 10:58:03 +0800 you wrote:
> Introduce support for the QCS9100 SoC device tree (DTSI) and the
> QCS9100 RIDE board DTS. The QCS9100 is a variant of the SA8775p.
> While the QCS9100 platform is still in the early design stage, the
> QCS9100 RIDE board is identical to the SA8775p RIDE board, except it
> mounts the QCS9100 SoC instead of the SA8775p SoC.
> 
> The QCS9100 SoC DTSI was directly renamed from the SA8775p SoC DTSI. In
> the upcoming weeks, Nikunj Kela will develop a new device tree related
> to SA8775p, specifically supporting the SCMI resource firmware solution
> for the SA8775p platform. If you're already familiar with the
> background, feel free to skip part[2], which provides a detailed
> explanation.
> 
> [...]

Here is the summary with links:
  - [01/47] dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board
    (no matching commit)
  - [02/47] arm64: dts: qcom: qcs9100: Introduce QCS9100 SoC dtsi
    (no matching commit)
  - [03/47] arm64: dts: qcom: qcs9100: Introduce QCS9100 PMIC dtsi
    https://git.kernel.org/netdev/net-next/c/df18948d331e
  - [04/47] arm64: dts: qcom: qcs9100: Add QCS9100 RIDE board dts
    (no matching commit)
  - [05/47] dt-bindings: firmware: qcom,scm: document SCM on QCS9100 SoC
    (no matching commit)
  - [06/47] dt-bindings: interconnect: qcom: document the interconnect compatibles for QCS9100
    (no matching commit)
  - [07/47] dt-bindings: clock: document QCS9100 GCC compatible
    (no matching commit)
  - [08/47] dt-bindings: mailbox: qcom-ipcc: Document the QCS9100 IPCC
    (no matching commit)
  - [09/47] dt-bindings: phy: Add QMP UFS PHY comptible for QCS9100
    (no matching commit)
  - [10/47] dt-bindings: crypto: ice: Document QCS9100 inline crypto engine
    (no matching commit)
  - [11/47] dt-bindings: crypto: qcom,prng: document QCS9100
    (no matching commit)
  - [12/47] dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for QCS9100
    (no matching commit)
  - [13/47] dt-bindings: ufs: qcom: document QCS9100 UFS
    (no matching commit)
  - [14/47] dt-bindings: phy: qcom,qmp-usb: Add QCS9100 USB3 PHY
    (no matching commit)
  - [15/47] dt-bindings: usb: dwc3: Add QCS9100 compatible
    (no matching commit)
  - [16/47] dt-bindings: clock: qcom: describe the GPUCC clock for QCS9100
    (no matching commit)
  - [17/47] dt-bindings: arm-smmu: Document QCS9100 GPU SMMU
    (no matching commit)
  - [18/47] dt-bindings: phy: describe the Qualcomm SGMII PHY for QCS9100
    (no matching commit)
  - [19/47] dt-bindings: cache: qcom,llcc: Add QCS9100 description
    (no matching commit)
  - [20/47] dt-bindings: interrupt-controller: qcom,pdc: document pdc on QCS9100
    (no matching commit)
  - [21/47] dt-bindings: thermal: qcom-tsens: document the QCS9100 Temperature Sensor
    (no matching commit)
  - [22/47] dt-bindings: soc: qcom,aoss-qmp: Document the QCS9100 AOSS channel
    (no matching commit)
  - [23/47] dt-bindings: pinctrl: add qcs9100-tlmm compatible
    (no matching commit)
  - [24/47] dt-bindings: soc: qcom: add qcom,qcs9100-imem compatible
    (no matching commit)
  - [25/47] dt-bindings: watchdog: qcom-wdt: document QCS9100
    (no matching commit)
  - [26/47] dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for QCS9100
    (no matching commit)
  - [27/47] dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCS9100 compatibles
    (no matching commit)
  - [28/47] dt-bindings: power: qcom,rpmpd: document the QCS9100 RPMh Power Domains
    (no matching commit)
  - [29/47] dt-bindings: net: qcom,ethqos: add description for qcs9100
    (no matching commit)
  - [30/47] dt-bindings: PCI: Document compatible for QCS9100
    (no matching commit)
  - [31/47] dt-bindings: PCI: qcom-ep: Add support for QCS9100 SoC
    (no matching commit)
  - [32/47] dt-bindings: phy: qcom,qmp: Add qcs9100 QMP PCIe PHY
    (no matching commit)
  - [33/47] interconnect: qcom: add driver support for qcs9100
    (no matching commit)
  - [34/47] clk: qcom: add the GCC driver support for QCS9100
    (no matching commit)
  - [35/47] phy: qcom-qmp-ufs: Add QCS9100 support
    (no matching commit)
  - [36/47] phy: qcpm-qmp-usb: Add support for QCS9100
    (no matching commit)
  - [37/47] clk: qcom: add the GPUCC driver support for QCS9100
    (no matching commit)
  - [38/47] phy: qcom: add the SGMII SerDes PHY driver support
    (no matching commit)
  - [39/47] soc: qcom: llcc: Add llcc configuration support for the QCS9100 platform
    (no matching commit)
  - [40/47] pinctrl: qcom: add the tlmm driver support for qcs9100 platform
    (no matching commit)
  - [41/47] clk: qcom: rpmh: Add support for QCS9100 rpmh clocks
    (no matching commit)

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html

Re: [PATCH 01/47] dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board

[patchwork-bot+netdevbpf]

Hello:

This series was applied to netdev/net-next.git (main)
by Jakub Kicinski <kuba@kernel.org>:

On Wed, 3 Jul 2024 11:56:49 +0800 you wrote:
> Document the QCS9100 SoC and RIDE board.
> 
> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> ---
>  Documentation/devicetree/bindings/arm/qcom.yaml | 3 +++
>  1 file changed, 3 insertions(+)

Here is the summary with links:
  - [01/47] dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board
    (no matching commit)
  - [02/47] arm64: dts: qcom: qcs9100: Introduce QCS9100 SoC dtsi
    (no matching commit)
  - [03/47] arm64: dts: qcom: qcs9100: Introduce QCS9100 PMIC dtsi
    https://git.kernel.org/netdev/net-next/c/df18948d331e
  - [04/47] arm64: dts: qcom: qcs9100: Add QCS9100 RIDE board dts
    (no matching commit)
  - [05/47] dt-bindings: firmware: qcom,scm: document SCM on QCS9100 SoC
    (no matching commit)
  - [06/47] dt-bindings: interconnect: qcom: document the interconnect compatibles for QCS9100
    (no matching commit)
  - [07/47] dt-bindings: clock: document QCS9100 GCC compatible
    (no matching commit)
  - [08/47] dt-bindings: mailbox: qcom-ipcc: Document the QCS9100 IPCC
    (no matching commit)
  - [09/47] dt-bindings: phy: Add QMP UFS PHY comptible for QCS9100
    (no matching commit)
  - [10/47] dt-bindings: crypto: ice: Document QCS9100 inline crypto engine
    (no matching commit)
  - [11/47] dt-bindings: crypto: qcom,prng: document QCS9100
    (no matching commit)
  - [12/47] dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for QCS9100
    (no matching commit)
  - [13/47] dt-bindings: ufs: qcom: document QCS9100 UFS
    (no matching commit)
  - [14/47] dt-bindings: phy: qcom,qmp-usb: Add QCS9100 USB3 PHY
    (no matching commit)
  - [15/47] dt-bindings: usb: dwc3: Add QCS9100 compatible
    (no matching commit)
  - [16/47] dt-bindings: clock: qcom: describe the GPUCC clock for QCS9100
    (no matching commit)
  - [17/47] dt-bindings: arm-smmu: Document QCS9100 GPU SMMU
    (no matching commit)
  - [18/47] dt-bindings: phy: describe the Qualcomm SGMII PHY for QCS9100
    (no matching commit)
  - [19/47] dt-bindings: cache: qcom,llcc: Add QCS9100 description
    (no matching commit)
  - [20/47] dt-bindings: interrupt-controller: qcom,pdc: document pdc on QCS9100
    (no matching commit)
  - [21/47] dt-bindings: thermal: qcom-tsens: document the QCS9100 Temperature Sensor
    (no matching commit)
  - [22/47] dt-bindings: soc: qcom,aoss-qmp: Document the QCS9100 AOSS channel
    (no matching commit)
  - [23/47] dt-bindings: pinctrl: add qcs9100-tlmm compatible
    (no matching commit)
  - [24/47] dt-bindings: soc: qcom: add qcom,qcs9100-imem compatible
    (no matching commit)
  - [25/47] dt-bindings: watchdog: qcom-wdt: document QCS9100
    (no matching commit)
  - [26/47] dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for QCS9100
    (no matching commit)
  - [27/47] dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCS9100 compatibles
    (no matching commit)
  - [28/47] dt-bindings: power: qcom,rpmpd: document the QCS9100 RPMh Power Domains
    (no matching commit)
  - [29/47] dt-bindings: net: qcom,ethqos: add description for qcs9100
    (no matching commit)

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html

Re: [PATCH 01/47] dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board

[Krzysztof Kozlowski]

On 03/07/2024 04:58, Tengfei Fan wrote:
> Document the QCS9100 SoC and RIDE board.
> 
> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> ---
>  Documentation/devicetree/bindings/arm/qcom.yaml | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
> index ec1c10a12470..f06543f96026 100644
> --- a/Documentation/devicetree/bindings/arm/qcom.yaml
> +++ b/Documentation/devicetree/bindings/arm/qcom.yaml
> @@ -45,6 +45,7 @@ description: |
>          qcs8550
>          qcm2290
>          qcm6490
> +        qcs9100
>          qdu1000
>          qrb2210
>          qrb4210
> @@ -894,7 +895,9 @@ properties:
>  
>        - items:
>            - enum:
> +              - qcom,qcs9100-ride
>                - qcom,sa8775p-ride
> +          - const: qcom,qcs9100

This changes existing compatible for sa8775p without any explanation in
commit msg.

Best regards,
Krzysztof

Re: [PATCH 04/47] arm64: dts: qcom: qcs9100: Add QCS9100 RIDE board dts

[Krzysztof Kozlowski]

On 03/07/2024 04:58, Tengfei Fan wrote:
> Add support for the QCS9100 RIDE board dts. The current QCS9100 RIDE
> board dts is directly renamed from the SA8775p RIDE board dts.
> The difference between the current QCS9100 RIDE board and the SA8775p
> RIDE board lies solely in the replacement of the SA8775p SoC with the
> QCS9100 SoC, all other board resources remain the same.
> The following items have been updated:
>   - use QCS9100-related compatible names for this board dts.
>   - replace the inclusion of sa8775p.dtsi with qcs9100.dtsi.
>   - replace the inclusion of sa8775p-pmics.dtsi with qcs9100-pmics.dtsi
> 
> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/Makefile                         | 2 +-
>  .../boot/dts/qcom/{sa8775p-ride.dts => qcs9100-ride.dts}  | 8 ++++----
>  2 files changed, 5 insertions(+), 5 deletions(-)
>  rename arch/arm64/boot/dts/qcom/{sa8775p-ride.dts => qcs9100-ride.dts} (99%)
> 
> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
> index 5576c7d6ea06..a7a3792b0691 100644
> --- a/arch/arm64/boot/dts/qcom/Makefile
> +++ b/arch/arm64/boot/dts/qcom/Makefile
> @@ -103,6 +103,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-rb3gen2.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= qcs8550-aim300-aiot.dtb
> +dtb-$(CONFIG_ARCH_QCOM)	+= qcs9100-ride.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= qdu1000-idp.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= qrb2210-rb1.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= qrb4210-rb2.dtb
> @@ -112,7 +113,6 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qru1000-idp.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sa8155p-adp.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sa8295p-adp.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sa8540p-ride.dtb
> -dtb-$(CONFIG_ARCH_QCOM)	+= sa8775p-ride.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-acer-aspire1.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-idp.dtb
>  dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-coachz-r1.dtb
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts
> similarity index 99%
> rename from arch/arm64/boot/dts/qcom/sa8775p-ride.dts
> rename to arch/arm64/boot/dts/qcom/qcs9100-ride.dts
> index 26ad05bd3b3f..2415d34b8aa5 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
> +++ b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts
> @@ -8,12 +8,12 @@
>  #include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
>  
> -#include "sa8775p.dtsi"
> -#include "sa8775p-pmics.dtsi"
> +#include "qcs9100.dtsi"
> +#include "qcs9100-pmics.dtsi"
>  
>  / {
> -	model = "Qualcomm SA8775P Ride";
> -	compatible = "qcom,sa8775p-ride", "qcom,sa8775p";
> +	model = "Qualcomm QCS9100 Ride";
> +	compatible = "qcom,qcs9100-ride", "qcom,qcs9100";

It does not look like you tested the DTS against bindings. Please run
`make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).

Your own internal guideline tells you to perform above tests, doesn't it?

Best regards,
Krzysztof

Re: [PATCH 02/47] arm64: dts: qcom: qcs9100: Introduce QCS9100 SoC dtsi

[Krzysztof Kozlowski]

On 03/07/2024 04:58, Tengfei Fan wrote:
> Introduce QCS9100 SoC dtsi, QCS9100 is mainly used in IoT products.
> QCS9100 is drived from SA8775p.
> The current QCS9100 SoC dtsi is directly renamed from the SA8775p SoC
> dtsi.
> The QCS9100 platform is currently in the early design stage. Currently,
> Both the QCS9100 platform and SA8775p platform use non-SCMI resources,
> In the future, the SA8775p platform will transition to using SCMI
> resources and it will have new sa8775p-related device tree.
> This QCS9100 SoC dtsi remains consistent with the current SA8775p SoC
> dtsi, except for updating the following sa8775p-related compatible names
> to the qcs9100-related compatible name:
>   - qcom,sa8775p-clk-virt
>   - qcom,sa8775p-mc-virt
>   - qcom,sa8775p-adsp-pas
>   - qcom,sa8775p-cdsp-pas
>   - qcom,sa8775p-cdsp1-pas
>   - qcom,sa8775p-gpdsp0-pas
>   - qcom,sa8775p-gpdsp1-pas
>   - qcom,sa8775p-gcc
>   - qcom,sa8775p-ipcc
>   - qcom,sa8775p-config-noc
>   - qcom,sa8775p-system-noc
>   - qcom,sa8775p-aggre1-noc
>   - qcom,sa8775p-aggre2-noc
>   - qcom,sa8775p-pcie-anoc
>   - qcom,sa8775p-gpdsp-anoc
>   - qcom,sa8775p-mmss-noc
>   - qcom,sa8775p-trng
>   - qcom,sa8775p-ufshc
>   - qcom,sa8775p-qmp-ufs-phy
>   - qcom,sa8775p-qce
>   - qcom,sa8775p-lpass-ag-noc
>   - qcom,sa8775p-usb-hs-phy
>   - qcom,sa8775p-dc-noc
>   - qcom,sa8775p-gem-noc
>   - qcom,sa8775p-dwc3
>   - qcom,sa8775p-qmp-usb3-uni-phy
>   - qcom,sa8775p-gpucc
>   - qcom,sa8775p-smmu-500
>   - qcom,sa8775p-dwmac-sgmii-phy
>   - qcom,sa8775p-llcc-bwmon
>   - qcom,sa8775p-cpu-bwmon
>   - qcom,sa8775p-llcc
>   - qcom,sa8775p-videocc
>   - qcom,sa8775p-camcc
>   - qcom,sa8775p-dispcc0
>   - qcom,sa8775p-pdc
>   - qcom,sa8775p-aoss-qmp
>   - qcom,sa8775p-tlmm
>   - qcom,sa8775p-imem
>   - qcom,sa8775p-smmu-500
>   - qcom,sa8775p-rpmh-clk
>   - qcom,sa8775p-rpmhpd
>   - qcom,sa8775p-cpufreq-epss
>   - qcom,sa8775p-dispcc1
>   - qcom,sa8775p-ethqos
>   - qcom,sa8775p-nspa-noc
>   - qcom,sa8775p-nspb-noc
>   - qcom,sa8775p-qmp-gen4x2-pcie-phy
>   - qcom,sa8775p-qmp-gen4x4-pcie-phy
> 
> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> ---
>  .../dts/qcom/{sa8775p.dtsi => qcs9100.dtsi}   | 112 +++++++++---------
>  1 file changed, 56 insertions(+), 56 deletions(-)
>  rename arch/arm64/boot/dts/qcom/{sa8775p.dtsi => qcs9100.dtsi} (97%)
> 

How do any things compile at this point? Please squash the patches. Your
patchset must be bisectable at build level (dtschema validation does not
have to).

Best regards,
Krzysztof

Re: [PATCH 00/47] arm64: qcom: dts: add QCS9100 support

[Krzysztof Kozlowski]

On 03/07/2024 05:56, Tengfei Fan wrote:
> Introduce support for the QCS9100 SoC device tree (DTSI) and the
> QCS9100 RIDE board DTS. The QCS9100 is a variant of the SA8775p.
> While the QCS9100 platform is still in the early design stage, the
> QCS9100 RIDE board is identical to the SA8775p RIDE board, except it
> mounts the QCS9100 SoC instead of the SA8775p SoC.

The same huge patchset, to huge number of recipients was sent twice.
First, sorry, this is way too big. Second, it has way too many
recipients, but this is partially a result of first point. Only
partially because you put here dozen of totally unrelated emails. Sorry,
that does not make even sense. See form letter at the end how this
works. Third, sending it to everyone twice is a way to annoy them off
twice... Fourth,

Please split your work and do not cc dozen of unrelated folks.

<form letter>
Please use scripts/get_maintainers.pl to get a list of necessary people
and lists to CC (and consider --no-git-fallback argument). It might
happen, that command when run on an older kernel, gives you outdated
entries. Therefore please be sure you base your patches on recent Linux
kernel.

Tools like b4 or scripts/get_maintainer.pl provide you proper list of
people, so fix your workflow. Tools might also fail if you work on some
ancient tree (don't, instead use mainline), work on fork of kernel
(don't, instead use mainline) or you ignore some maintainers (really
don't). Just use b4 and everything should be fine, although remember
about `b4 prep --auto-to-cc` if you added new patches to the patchset.
</form letter>

Best regards,
Krzysztof

Re: [PATCH 41/47] clk: qcom: rpmh: Add support for QCS9100 rpmh clocks

[Taniya Das]

On 7/3/2024 9:21 AM, Tengfei Fan wrote:
> { .compatible = "qcom,qcs9100-rpmh-clk", .data = &clk_rpmh_sa8775p},

This is not required, we already have sa8775p bindings.
-- 
Thanks & Regards,
Taniya Das.

Re: [PATCH 27/47] dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCS9100 compatibles

[Taniya Das]

On 7/3/2024 9:27 AM, Tengfei Fan wrote:
> +              - qcom,qcs9100-cpufreq-epss

This is not required as we already have sa8775p bindings.

-- 
Thanks & Regards,
Taniya Das.

Re: [PATCH 00/47] arm64: qcom: dts: add QCS9100 support

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 1234 bytes --]

On Wed, Jul 03, 2024 at 06:45:00AM +0200, Krzysztof Kozlowski wrote:
> On 03/07/2024 05:56, Tengfei Fan wrote:
> > Introduce support for the QCS9100 SoC device tree (DTSI) and the
> > QCS9100 RIDE board DTS. The QCS9100 is a variant of the SA8775p.
> > While the QCS9100 platform is still in the early design stage, the
> > QCS9100 RIDE board is identical to the SA8775p RIDE board, except it
> > mounts the QCS9100 SoC instead of the SA8775p SoC.
> 
> The same huge patchset, to huge number of recipients was sent twice.
> First, sorry, this is way too big. Second, it has way too many
> recipients, but this is partially a result of first point. Only
> partially because you put here dozen of totally unrelated emails. Sorry,
> that does not make even sense. See form letter at the end how this
> works. Third, sending it to everyone twice is a way to annoy them off
> twice... Fourth,
> 
> Please split your work and do not cc dozen of unrelated folks.

One of the extra recipients is cos that of that patch I sent adding the
cache bindings to the cache entry, forgetting that that would CC the
riscv list on all cache bindings. I modified that patch to drop the riscv
list from the entry.

Cheers,
Conor.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]

Re: [PATCH 01/47] dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board

[Tengfei Fan]

On 7/3/2024 12:38 PM, Krzysztof Kozlowski wrote:
> On 03/07/2024 04:58, Tengfei Fan wrote:
>> Document the QCS9100 SoC and RIDE board.
>>
>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>> ---
>>   Documentation/devicetree/bindings/arm/qcom.yaml | 3 +++
>>   1 file changed, 3 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml
>> index ec1c10a12470..f06543f96026 100644
>> --- a/Documentation/devicetree/bindings/arm/qcom.yaml
>> +++ b/Documentation/devicetree/bindings/arm/qcom.yaml
>> @@ -45,6 +45,7 @@ description: |
>>           qcs8550
>>           qcm2290
>>           qcm6490
>> +        qcs9100
>>           qdu1000
>>           qrb2210
>>           qrb4210
>> @@ -894,7 +895,9 @@ properties:
>>   
>>         - items:
>>             - enum:
>> +              - qcom,qcs9100-ride
>>                 - qcom,sa8775p-ride
>> +          - const: qcom,qcs9100
> 
> This changes existing compatible for sa8775p without any explanation in
> commit msg.
> 
> Best regards,
> Krzysztof
> 

In the next verion patch series, I will provide relevant explanatory 
information in this patch commit message.

-- 
Thx and BRs,
Tengfei Fan

Re: [PATCH 02/47] arm64: dts: qcom: qcs9100: Introduce QCS9100 SoC dtsi

[Tengfei Fan]

On 7/3/2024 12:40 PM, Krzysztof Kozlowski wrote:
> On 03/07/2024 04:58, Tengfei Fan wrote:
>> Introduce QCS9100 SoC dtsi, QCS9100 is mainly used in IoT products.
>> QCS9100 is drived from SA8775p.
>> The current QCS9100 SoC dtsi is directly renamed from the SA8775p SoC
>> dtsi.
>> The QCS9100 platform is currently in the early design stage. Currently,
>> Both the QCS9100 platform and SA8775p platform use non-SCMI resources,
>> In the future, the SA8775p platform will transition to using SCMI
>> resources and it will have new sa8775p-related device tree.
>> This QCS9100 SoC dtsi remains consistent with the current SA8775p SoC
>> dtsi, except for updating the following sa8775p-related compatible names
>> to the qcs9100-related compatible name:
>>    - qcom,sa8775p-clk-virt
>>    - qcom,sa8775p-mc-virt
>>    - qcom,sa8775p-adsp-pas
>>    - qcom,sa8775p-cdsp-pas
>>    - qcom,sa8775p-cdsp1-pas
>>    - qcom,sa8775p-gpdsp0-pas
>>    - qcom,sa8775p-gpdsp1-pas
>>    - qcom,sa8775p-gcc
>>    - qcom,sa8775p-ipcc
>>    - qcom,sa8775p-config-noc
>>    - qcom,sa8775p-system-noc
>>    - qcom,sa8775p-aggre1-noc
>>    - qcom,sa8775p-aggre2-noc
>>    - qcom,sa8775p-pcie-anoc
>>    - qcom,sa8775p-gpdsp-anoc
>>    - qcom,sa8775p-mmss-noc
>>    - qcom,sa8775p-trng
>>    - qcom,sa8775p-ufshc
>>    - qcom,sa8775p-qmp-ufs-phy
>>    - qcom,sa8775p-qce
>>    - qcom,sa8775p-lpass-ag-noc
>>    - qcom,sa8775p-usb-hs-phy
>>    - qcom,sa8775p-dc-noc
>>    - qcom,sa8775p-gem-noc
>>    - qcom,sa8775p-dwc3
>>    - qcom,sa8775p-qmp-usb3-uni-phy
>>    - qcom,sa8775p-gpucc
>>    - qcom,sa8775p-smmu-500
>>    - qcom,sa8775p-dwmac-sgmii-phy
>>    - qcom,sa8775p-llcc-bwmon
>>    - qcom,sa8775p-cpu-bwmon
>>    - qcom,sa8775p-llcc
>>    - qcom,sa8775p-videocc
>>    - qcom,sa8775p-camcc
>>    - qcom,sa8775p-dispcc0
>>    - qcom,sa8775p-pdc
>>    - qcom,sa8775p-aoss-qmp
>>    - qcom,sa8775p-tlmm
>>    - qcom,sa8775p-imem
>>    - qcom,sa8775p-smmu-500
>>    - qcom,sa8775p-rpmh-clk
>>    - qcom,sa8775p-rpmhpd
>>    - qcom,sa8775p-cpufreq-epss
>>    - qcom,sa8775p-dispcc1
>>    - qcom,sa8775p-ethqos
>>    - qcom,sa8775p-nspa-noc
>>    - qcom,sa8775p-nspb-noc
>>    - qcom,sa8775p-qmp-gen4x2-pcie-phy
>>    - qcom,sa8775p-qmp-gen4x4-pcie-phy
>>
>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>> ---
>>   .../dts/qcom/{sa8775p.dtsi => qcs9100.dtsi}   | 112 +++++++++---------
>>   1 file changed, 56 insertions(+), 56 deletions(-)
>>   rename arch/arm64/boot/dts/qcom/{sa8775p.dtsi => qcs9100.dtsi} (97%)
>>
> 
> How do any things compile at this point? Please squash the patches. Your
> patchset must be bisectable at build level (dtschema validation does not
> have to).
> 
> Best regards,
> Krzysztof
> 

The compilation issue indeed arises when applying only this single 
patch. In the new version patch series, I plan to consolidate the three 
patches that rename sa8775p.dtsi to qcs9100.dtsi, sa8775p-pmics.dtsi to 
qcs9100-pmics.dtsi, and sa87750-ride.dts to qcs9100-ride.dts into a 
single patch.

-- 
Thx and BRs,
Tengfei Fan

Re: [PATCH 04/47] arm64: dts: qcom: qcs9100: Add QCS9100 RIDE board dts

[Tengfei Fan]

On 7/3/2024 12:39 PM, Krzysztof Kozlowski wrote:
> On 03/07/2024 04:58, Tengfei Fan wrote:
>> Add support for the QCS9100 RIDE board dts. The current QCS9100 RIDE
>> board dts is directly renamed from the SA8775p RIDE board dts.
>> The difference between the current QCS9100 RIDE board and the SA8775p
>> RIDE board lies solely in the replacement of the SA8775p SoC with the
>> QCS9100 SoC, all other board resources remain the same.
>> The following items have been updated:
>>    - use QCS9100-related compatible names for this board dts.
>>    - replace the inclusion of sa8775p.dtsi with qcs9100.dtsi.
>>    - replace the inclusion of sa8775p-pmics.dtsi with qcs9100-pmics.dtsi
>>
>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/Makefile                         | 2 +-
>>   .../boot/dts/qcom/{sa8775p-ride.dts => qcs9100-ride.dts}  | 8 ++++----
>>   2 files changed, 5 insertions(+), 5 deletions(-)
>>   rename arch/arm64/boot/dts/qcom/{sa8775p-ride.dts => qcs9100-ride.dts} (99%)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile
>> index 5576c7d6ea06..a7a3792b0691 100644
>> --- a/arch/arm64/boot/dts/qcom/Makefile
>> +++ b/arch/arm64/boot/dts/qcom/Makefile
>> @@ -103,6 +103,7 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-1000.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= qcs404-evb-4000.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= qcs6490-rb3gen2.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= qcs8550-aim300-aiot.dtb
>> +dtb-$(CONFIG_ARCH_QCOM)	+= qcs9100-ride.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= qdu1000-idp.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= qrb2210-rb1.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= qrb4210-rb2.dtb
>> @@ -112,7 +113,6 @@ dtb-$(CONFIG_ARCH_QCOM)	+= qru1000-idp.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= sa8155p-adp.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= sa8295p-adp.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= sa8540p-ride.dtb
>> -dtb-$(CONFIG_ARCH_QCOM)	+= sa8775p-ride.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-acer-aspire1.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-idp.dtb
>>   dtb-$(CONFIG_ARCH_QCOM)	+= sc7180-trogdor-coachz-r1.dtb
>> diff --git a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts
>> similarity index 99%
>> rename from arch/arm64/boot/dts/qcom/sa8775p-ride.dts
>> rename to arch/arm64/boot/dts/qcom/qcs9100-ride.dts
>> index 26ad05bd3b3f..2415d34b8aa5 100644
>> --- a/arch/arm64/boot/dts/qcom/sa8775p-ride.dts
>> +++ b/arch/arm64/boot/dts/qcom/qcs9100-ride.dts
>> @@ -8,12 +8,12 @@
>>   #include <dt-bindings/gpio/gpio.h>
>>   #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
>>   
>> -#include "sa8775p.dtsi"
>> -#include "sa8775p-pmics.dtsi"
>> +#include "qcs9100.dtsi"
>> +#include "qcs9100-pmics.dtsi"
>>   
>>   / {
>> -	model = "Qualcomm SA8775P Ride";
>> -	compatible = "qcom,sa8775p-ride", "qcom,sa8775p";
>> +	model = "Qualcomm QCS9100 Ride";
>> +	compatible = "qcom,qcs9100-ride", "qcom,qcs9100";
> 
> It does not look like you tested the DTS against bindings. Please run
> `make dtbs_check W=1` (see
> Documentation/devicetree/bindings/writing-schema.rst or
> https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
> for instructions).
> 
> Your own internal guideline tells you to perform above tests, doesn't it?
> 
> Best regards,
> Krzysztof
> 

I have performed relevant check, and it's possible that there are some 
issues about the parameters used. I will follow your advice and refer to 
the relevant documentation to perform DTBS check again, ensuring that 
similar issues do not arise in the future.

-- 
Thx and BRs,
Tengfei Fan

Re: [PATCH 01/47] dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board

[Krzysztof Kozlowski]

On 03/07/2024 11:21, Tengfei Fan wrote:
>>>         - items:
>>>             - enum:
>>> +              - qcom,qcs9100-ride
>>>                 - qcom,sa8775p-ride
>>> +          - const: qcom,qcs9100
>>
>> This changes existing compatible for sa8775p without any explanation in
>> commit msg.
>>
>> Best regards,
>> Krzysztof
>>
> 
> In the next verion patch series, I will provide relevant explanatory 
> information in this patch commit message.

TBH, I cannot think of any reasonable explanation for this, especially
considering rest of the patchset which does not fix resulting dtbs_check
warning.

Best regards,
Krzysztof

Re: [PATCH 00/47] arm64: qcom: dts: add QCS9100 support

[Tengfei Fan]

On 7/3/2024 12:45 PM, Krzysztof Kozlowski wrote:
> On 03/07/2024 05:56, Tengfei Fan wrote:
>> Introduce support for the QCS9100 SoC device tree (DTSI) and the
>> QCS9100 RIDE board DTS. The QCS9100 is a variant of the SA8775p.
>> While the QCS9100 platform is still in the early design stage, the
>> QCS9100 RIDE board is identical to the SA8775p RIDE board, except it
>> mounts the QCS9100 SoC instead of the SA8775p SoC.
> 
> The same huge patchset, to huge number of recipients was sent twice.
> First, sorry, this is way too big. Second, it has way too many
> recipients, but this is partially a result of first point. Only
> partially because you put here dozen of totally unrelated emails. Sorry,
> that does not make even sense. See form letter at the end how this
> works. Third, sending it to everyone twice is a way to annoy them off
> twice... Fourth,
> 
> Please split your work and do not cc dozen of unrelated folks.

I can split this patch series, there are two options for splitting:
Option A:
   1. Initial qcs9100.dtsi, qcs9100-pmics.dtsi, qcs9100-ride.dts renamed 
from sa8775p with existing compatible.

   2. Each subsystem have single patch series to each limited driver 
maintainers.

      - About 15 series need to update related drivers, so each series 
will have 3 patches (bindings, drivers, the compatible names in 
subsystem-related parts of dtsi/dts).

      - About 14 series only need to add qcs9100 compatible in 
bindings., so each series will have 2 patches (bindings, the compatible 
names in subsystem-related parts of dtsi/dts).

Option B:

   1. Each subsystem have single patch series to each limited driver 
maintainers. Each patch series only update bindings, drivers, but no 
compatible names change in dts.

      - About 15 series in total and each series will have 2 patches 
(bindings, drivers).

      - About 14 series only need to add qcs9100 compatible in bindings, 
so each series will have 1 patches (bindings).

   2. Squash current qcs9100.dtsi, qcs9100-pmics.dtsi, qcs9100-ride.dts 
with compatible changed to qcs9100 dt files.

We tend to use Option A.

Welcome to other ideas ideas for splitting the huge numbers of patches 
as well.

Another, each splited series will also have cover letter contain the 
whole story like this cover letter.

> 
> <form letter>
> Please use scripts/get_maintainers.pl to get a list of necessary people
> and lists to CC (and consider --no-git-fallback argument). It might
> happen, that command when run on an older kernel, gives you outdated
> entries. Therefore please be sure you base your patches on recent Linux
> kernel.
> 
> Tools like b4 or scripts/get_maintainer.pl provide you proper list of
> people, so fix your workflow. Tools might also fail if you work on some
> ancient tree (don't, instead use mainline), work on fork of kernel
> (don't, instead use mainline) or you ignore some maintainers (really
> don't). Just use b4 and everything should be fine, although remember
> about `b4 prep --auto-to-cc` if you added new patches to the patchset.
> </form letter>
> 
> Best regards,
> Krzysztof
> 

Previously, I've been using scripts/get_maintainers.pl to obtain a list 
of recipients and manually removing duplicate email addresses(although I 
noticed you have two different email addresses, so I included both).
I'll follow your advice and use b4 to submit a new version patch series 
to upstream, confident that similar issues won't arise again.

-- 
Thx and BRs,
Tengfei Fan

Re: [PATCH 01/47] dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board

[Tengfei Fan]

On 7/3/2024 5:33 PM, Krzysztof Kozlowski wrote:
> On 03/07/2024 11:21, Tengfei Fan wrote:
>>>>          - items:
>>>>              - enum:
>>>> +              - qcom,qcs9100-ride
>>>>                  - qcom,sa8775p-ride
>>>> +          - const: qcom,qcs9100
>>>
>>> This changes existing compatible for sa8775p without any explanation in
>>> commit msg.
>>>
>>> Best regards,
>>> Krzysztof
>>>
>>
>> In the next verion patch series, I will provide relevant explanatory
>> information in this patch commit message.
> 
> TBH, I cannot think of any reasonable explanation for this, especially
> considering rest of the patchset which does not fix resulting dtbs_check
> warning.
> 
> Best regards,
> Krzysztof
> 

This patch may need to be updated based on the results of dtbs_check. In 
the new version patch series, I will revise the commit message according 
to the patch updates made.

-- 
Thx and BRs,
Tengfei Fan

Re: [PATCH 41/47] clk: qcom: rpmh: Add support for QCS9100 rpmh clocks

[Tengfei Fan]

On 7/3/2024 1:33 PM, Taniya Das wrote:
> 
> 
> On 7/3/2024 9:21 AM, Tengfei Fan wrote:
>> { .compatible = "qcom,qcs9100-rpmh-clk", .data = &clk_rpmh_sa8775p},
> 
> This is not required, we already have sa8775p bindings.

This patch is necessary, and the cover letter provides detailed 
explanations for why we are making this change.

In this patch series, we are renaming sa8775p.dtsi to qcs9100.dtsi. 
Additionally, in the coming weeks, the auto team will submit a new 
sa8775p-related dtsi to upstream.

Within qcs9100.dtsi, we are updating all compatible names from sa8775p-* 
to qcs9100-*(only have qcs9100-*, remove all sa8775p-*). Consequently, 
we need to add support for qcs9100-* in the driver as well.


-- 
Thx and BRs,
Tengfei Fan

Re: [PATCH 27/47] dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCS9100 compatibles

[Tengfei Fan]

On 7/3/2024 1:35 PM, Taniya Das wrote:
> 
> 
> On 7/3/2024 9:27 AM, Tengfei Fan wrote:
>> +              - qcom,qcs9100-cpufreq-epss
> 
> This is not required as we already have sa8775p bindings.

This is necessary. The reason is same as my reply in patch 41/47.

> 

-- 
Thx and BRs,
Tengfei Fan

Re: [PATCH 00/47] arm64: qcom: dts: add QCS9100 support

[Dmitry Baryshkov]

On Wed, Jul 03, 2024 at 11:56:48AM GMT, Tengfei Fan wrote:
> Introduce support for the QCS9100 SoC device tree (DTSI) and the
> QCS9100 RIDE board DTS. The QCS9100 is a variant of the SA8775p.
> While the QCS9100 platform is still in the early design stage, the
> QCS9100 RIDE board is identical to the SA8775p RIDE board, except it
> mounts the QCS9100 SoC instead of the SA8775p SoC.

Your patch series includes a second copy of your patches, wich have
different Message-IDs:

20240703035735.2182165-1-quic_tengfan@quicinc.com vs
20240703025850.2172008-1-quic_tengfan@quicinc.com

Please consider switching to the b4 tool or just
checking what is being sent.

-- 
With best wishes
Dmitry

Re: [PATCH 29/47] dt-bindings: net: qcom,ethqos: add description for qcs9100

[Andrew Halaney]

On Wed, Jul 03, 2024 at 10:58:32AM GMT, Tengfei Fan wrote:
> Add the compatible for the MAC controller on qcs9100 platforms. This MAC
> works with a single interrupt so add minItems to the interrupts property.
> The fourth clock's name is different here so change it. Enable relevant
> PHY properties. Add the relevant compatibles to the binding document for
> snps,dwmac as well.

This description doesn't match what was done in this patch, its what
Bart did when he made changes to add the sa8775 changes. Please consider
using a blurb indicating that this is the same SoC as sa8775p, just with
different firmware strategies or something along those lines?

> 
> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
> ---
>  Documentation/devicetree/bindings/net/qcom,ethqos.yaml | 1 +
>  Documentation/devicetree/bindings/net/snps,dwmac.yaml  | 3 +++
>  2 files changed, 4 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
> index 6672327358bc..8ab11e00668c 100644
> --- a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
> +++ b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
> @@ -20,6 +20,7 @@ properties:
>    compatible:
>      enum:
>        - qcom,qcs404-ethqos
> +      - qcom,qcs9100-ethqos
>        - qcom,sa8775p-ethqos
>        - qcom,sc8280xp-ethqos
>        - qcom,sm8150-ethqos
> diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> index 3bab4e1f3fbf..269c21779396 100644
> --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
> @@ -67,6 +67,7 @@ properties:
>          - loongson,ls2k-dwmac
>          - loongson,ls7a-dwmac
>          - qcom,qcs404-ethqos
> +        - qcom,qcs9100-ethqos
>          - qcom,sa8775p-ethqos
>          - qcom,sc8280xp-ethqos
>          - qcom,sm8150-ethqos
> @@ -582,6 +583,7 @@ allOf:
>                - ingenic,x1600-mac
>                - ingenic,x1830-mac
>                - ingenic,x2000-mac
> +              - qcom,qcs9100-ethqos
>                - qcom,sa8775p-ethqos
>                - qcom,sc8280xp-ethqos
>                - snps,dwmac-3.50a
> @@ -639,6 +641,7 @@ allOf:
>                - ingenic,x1830-mac
>                - ingenic,x2000-mac
>                - qcom,qcs404-ethqos
> +              - qcom,qcs9100-ethqos
>                - qcom,sa8775p-ethqos
>                - qcom,sc8280xp-ethqos
>                - qcom,sm8150-ethqos
> -- 
> 2.25.1
> 

Re: [PATCH 00/47] arm64: qcom: dts: add QCS9100 support

[Jakub Kicinski]

On Wed, 03 Jul 2024 04:20:29 +0000 patchwork-bot+netdevbpf@kernel.org
wrote:
> This series was applied to netdev/net-next.git (main)
> by Jakub Kicinski <kuba@kernel.org>:

> Here is the summary with links:
>   - [01/47] dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board
>     (no matching commit)
>   - [02/47] arm64: dts: qcom: qcs9100: Introduce QCS9100 SoC dtsi
>     (no matching commit)
>   - [03/47] arm64: dts: qcom: qcs9100: Introduce QCS9100 PMIC dtsi
>     https://git.kernel.org/netdev/net-next/c/df18948d331e

This is some bug / false positive in the bot, to be clear.
Commit df18948d331e is ("Merge branch 'device-memory-tcp'").
No idea how it got from that to DTS.

Re: [PATCH 00/47] arm64: qcom: dts: add QCS9100 support

[Tengfei Fan]

On 7/3/2024 6:33 PM, Dmitry Baryshkov wrote:
> On Wed, Jul 03, 2024 at 11:56:48AM GMT, Tengfei Fan wrote:
>> Introduce support for the QCS9100 SoC device tree (DTSI) and the
>> QCS9100 RIDE board DTS. The QCS9100 is a variant of the SA8775p.
>> While the QCS9100 platform is still in the early design stage, the
>> QCS9100 RIDE board is identical to the SA8775p RIDE board, except it
>> mounts the QCS9100 SoC instead of the SA8775p SoC.
> 
> Your patch series includes a second copy of your patches, wich have
> different Message-IDs:
> 
> 20240703035735.2182165-1-quic_tengfan@quicinc.com vs
> 20240703025850.2172008-1-quic_tengfan@quicinc.com
> 
> Please consider switching to the b4 tool or just
> checking what is being sent.
> 

This is because I encountered a "Connection timed out" error while 
sending this patch series using "git send-email". I wanted to add 
"--in-reply-to=" git paramater to resend the patches that haven't been 
pushed yet, which resulted in this second copy error result.

I'll following your suggestion and use the b4 tool when sending the new 
version patch series to avoid similar error.

-- 
Thx and BRs,
Tengfei Fan

Re: [PATCH 00/47] arm64: qcom: dts: add QCS9100 support

[Tengfei Fan]

On 7/4/2024 2:49 AM, Jakub Kicinski wrote:
> This is some bug / false positive in the bot, to be clear.
> Commit df18948d331e is ("Merge branch 'device-memory-tcp'").
> No idea how it got from that to DTS.

This issue may be due to the patch series being too large. In the 
future, I plan to split the patch series by different subsystem, which 
should prevent similar issue.

-- 
Thx and BRs,
Tengfei Fan

Re: [PATCH 29/47] dt-bindings: net: qcom,ethqos: add description for qcs9100

[Tengfei Fan]

On 7/3/2024 11:09 PM, Andrew Halaney wrote:
> On Wed, Jul 03, 2024 at 10:58:32AM GMT, Tengfei Fan wrote:
>> Add the compatible for the MAC controller on qcs9100 platforms. This MAC
>> works with a single interrupt so add minItems to the interrupts property.
>> The fourth clock's name is different here so change it. Enable relevant
>> PHY properties. Add the relevant compatibles to the binding document for
>> snps,dwmac as well.
> 
> This description doesn't match what was done in this patch, its what
> Bart did when he made changes to add the sa8775 changes. Please consider
> using a blurb indicating that this is the same SoC as sa8775p, just with
> different firmware strategies or something along those lines?

I will update this commit message as you suggested.

> 
>>
>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com>
>> ---
>>   Documentation/devicetree/bindings/net/qcom,ethqos.yaml | 1 +
>>   Documentation/devicetree/bindings/net/snps,dwmac.yaml  | 3 +++
>>   2 files changed, 4 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
>> index 6672327358bc..8ab11e00668c 100644
>> --- a/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
>> +++ b/Documentation/devicetree/bindings/net/qcom,ethqos.yaml
>> @@ -20,6 +20,7 @@ properties:
>>     compatible:
>>       enum:
>>         - qcom,qcs404-ethqos
>> +      - qcom,qcs9100-ethqos
>>         - qcom,sa8775p-ethqos
>>         - qcom,sc8280xp-ethqos
>>         - qcom,sm8150-ethqos
>> diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
>> index 3bab4e1f3fbf..269c21779396 100644
>> --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml
>> +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml
>> @@ -67,6 +67,7 @@ properties:
>>           - loongson,ls2k-dwmac
>>           - loongson,ls7a-dwmac
>>           - qcom,qcs404-ethqos
>> +        - qcom,qcs9100-ethqos
>>           - qcom,sa8775p-ethqos
>>           - qcom,sc8280xp-ethqos
>>           - qcom,sm8150-ethqos
>> @@ -582,6 +583,7 @@ allOf:
>>                 - ingenic,x1600-mac
>>                 - ingenic,x1830-mac
>>                 - ingenic,x2000-mac
>> +              - qcom,qcs9100-ethqos
>>                 - qcom,sa8775p-ethqos
>>                 - qcom,sc8280xp-ethqos
>>                 - snps,dwmac-3.50a
>> @@ -639,6 +641,7 @@ allOf:
>>                 - ingenic,x1830-mac
>>                 - ingenic,x2000-mac
>>                 - qcom,qcs404-ethqos
>> +              - qcom,qcs9100-ethqos
>>                 - qcom,sa8775p-ethqos
>>                 - qcom,sc8280xp-ethqos
>>                 - qcom,sm8150-ethqos
>> -- 
>> 2.25.1
>>
> 

-- 
Thx and BRs,
Tengfei Fan

Re: [PATCH 29/47] dt-bindings: net: qcom,ethqos: add description for qcs9100

[Andrew Lunn]

On Thu, Jul 04, 2024 at 09:13:59AM +0800, Tengfei Fan wrote:
> 
> 
> On 7/3/2024 11:09 PM, Andrew Halaney wrote:
> > On Wed, Jul 03, 2024 at 10:58:32AM GMT, Tengfei Fan wrote:
> > > Add the compatible for the MAC controller on qcs9100 platforms. This MAC
> > > works with a single interrupt so add minItems to the interrupts property.
> > > The fourth clock's name is different here so change it. Enable relevant
> > > PHY properties. Add the relevant compatibles to the binding document for
> > > snps,dwmac as well.
> > 
> > This description doesn't match what was done in this patch, its what
> > Bart did when he made changes to add the sa8775 changes. Please consider
> > using a blurb indicating that this is the same SoC as sa8775p, just with
> > different firmware strategies or something along those lines?
> 
> I will update this commit message as you suggested.

Hi Andrew, Tengfei

Please trim emails when replying to just the needed context.

Thanks
	Andrew

Re: [PATCH 29/47] dt-bindings: net: qcom,ethqos: add description for qcs9100

[Andrew Halaney]

On Thu, Jul 04, 2024 at 06:03:14PM GMT, Andrew Lunn wrote:
> On Thu, Jul 04, 2024 at 09:13:59AM +0800, Tengfei Fan wrote:
> > 
> > 
> > On 7/3/2024 11:09 PM, Andrew Halaney wrote:
> > > On Wed, Jul 03, 2024 at 10:58:32AM GMT, Tengfei Fan wrote:
> > > > Add the compatible for the MAC controller on qcs9100 platforms. This MAC
> > > > works with a single interrupt so add minItems to the interrupts property.
> > > > The fourth clock's name is different here so change it. Enable relevant
> > > > PHY properties. Add the relevant compatibles to the binding document for
> > > > snps,dwmac as well.
> > > 
> > > This description doesn't match what was done in this patch, its what
> > > Bart did when he made changes to add the sa8775 changes. Please consider
> > > using a blurb indicating that this is the same SoC as sa8775p, just with
> > > different firmware strategies or something along those lines?
> > 
> > I will update this commit message as you suggested.
> 
> Hi Andrew, Tengfei
> 
> Please trim emails when replying to just the needed context.
> 

Sorry, I'm always a little guilty of this. In this case I didn't trim
since the patch was small and trimming the diff out would then make it
tough to see how my comment about the description relates to the body of
the patch. But I'll try and trim when appropriate. Just replying here to
explain myself as this isn't the first time I've been suggested to trim
more aggressively and I don't want folks to think I'm completely ignoring them.

Thanks,
Andrew

Re: [PATCH 01/47] dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board

[Aiqun Yu (Maria)]

On 7/3/2024 5:33 PM, Krzysztof Kozlowski wrote:
> On 03/07/2024 11:21, Tengfei Fan wrote:
>>>>         - items:
>>>>             - enum:
>>>> +              - qcom,qcs9100-ride
>>>>                 - qcom,sa8775p-ride
>>>> +          - const: qcom,qcs9100
>>>
>>> This changes existing compatible for sa8775p without any explanation in
>>> commit msg.
>>>
>>> Best regards,
>>> Krzysztof
>>>
>>
>> In the next verion patch series, I will provide relevant explanatory 
>> information in this patch commit message.
> 
> TBH, I cannot think of any reasonable explanation for this, especially
> considering rest of the patchset which does not fix resulting dtbs_check
> warning.

The existing compatible "sa8775p" warning can only be addressed When
@Nikunj's "sa8775p" changes merged.

Let me know if you have other suggestions for this.

> 
> Best regards,
> Krzysztof
> 

-- 
Thx and BRs,
Aiqun(Maria) Yu

Re: [PATCH 01/47] dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board

[Krzysztof Kozlowski]

On 08/07/2024 06:45, Aiqun Yu (Maria) wrote:
> 
> 
> On 7/3/2024 5:33 PM, Krzysztof Kozlowski wrote:
>> On 03/07/2024 11:21, Tengfei Fan wrote:
>>>>>         - items:
>>>>>             - enum:
>>>>> +              - qcom,qcs9100-ride
>>>>>                 - qcom,sa8775p-ride
>>>>> +          - const: qcom,qcs9100
>>>>
>>>> This changes existing compatible for sa8775p without any explanation in
>>>> commit msg.
>>>>
>>>> Best regards,
>>>> Krzysztof
>>>>
>>>
>>> In the next verion patch series, I will provide relevant explanatory 
>>> information in this patch commit message.
>>
>> TBH, I cannot think of any reasonable explanation for this, especially
>> considering rest of the patchset which does not fix resulting dtbs_check
>> warning.
> 
> The existing compatible "sa8775p" warning can only be addressed When
> @Nikunj's "sa8775p" changes merged.
> 
> Let me know if you have other suggestions for this.

I don't have, because I don't understand why do you want/need to change
existing board compatible.

Best regards,
Krzysztof

Re: [PATCH 01/47] dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board

[Aiqun Yu (Maria)]

On 7/8/2024 2:07 PM, Krzysztof Kozlowski wrote:
> On 08/07/2024 06:45, Aiqun Yu (Maria) wrote:
>>
>>
>> On 7/3/2024 5:33 PM, Krzysztof Kozlowski wrote:
>>> On 03/07/2024 11:21, Tengfei Fan wrote:
>>>>>>         - items:
>>>>>>             - enum:
>>>>>> +              - qcom,qcs9100-ride
>>>>>>                 - qcom,sa8775p-ride
>>>>>> +          - const: qcom,qcs9100
>>>>>
>>>>> This changes existing compatible for sa8775p without any explanation in
>>>>> commit msg.
>>>>>
>>>>> Best regards,
>>>>> Krzysztof
>>>>>
>>>>
>>>> In the next verion patch series, I will provide relevant explanatory 
>>>> information in this patch commit message.
>>>
>>> TBH, I cannot think of any reasonable explanation for this, especially
>>> considering rest of the patchset which does not fix resulting dtbs_check
>>> warning.
>>
>> The existing compatible "sa8775p" warning can only be addressed When
>> @Nikunj's "sa8775p" changes merged.
>>
>> Let me know if you have other suggestions for this.
> 
> I don't have, because I don't understand why do you want/need to change
> existing board compatible.

We can left the current existing sa8775p board compatible as it is. And
have a brand new qcs9100 and qcs9100-board item for current non-scmi
resources compatible.

Will that be more reasonable from your end?

> 
> Best regards,
> Krzysztof
> 

-- 
Thx and BRs,
Aiqun(Maria) Yu

Re: [PATCH 01/47] dt-bindings: arm: qcom: Document QCS9100 SoC and RIDE board

[Krzysztof Kozlowski]

On 08/07/2024 09:13, Aiqun Yu (Maria) wrote:
> 
> 
> On 7/8/2024 2:07 PM, Krzysztof Kozlowski wrote:
>> On 08/07/2024 06:45, Aiqun Yu (Maria) wrote:
>>>
>>>
>>> On 7/3/2024 5:33 PM, Krzysztof Kozlowski wrote:
>>>> On 03/07/2024 11:21, Tengfei Fan wrote:
>>>>>>>         - items:
>>>>>>>             - enum:
>>>>>>> +              - qcom,qcs9100-ride
>>>>>>>                 - qcom,sa8775p-ride
>>>>>>> +          - const: qcom,qcs9100
>>>>>>
>>>>>> This changes existing compatible for sa8775p without any explanation in
>>>>>> commit msg.
>>>>>>
>>>>>> Best regards,
>>>>>> Krzysztof
>>>>>>
>>>>>
>>>>> In the next verion patch series, I will provide relevant explanatory 
>>>>> information in this patch commit message.
>>>>
>>>> TBH, I cannot think of any reasonable explanation for this, especially
>>>> considering rest of the patchset which does not fix resulting dtbs_check
>>>> warning.
>>>
>>> The existing compatible "sa8775p" warning can only be addressed When
>>> @Nikunj's "sa8775p" changes merged.
>>>
>>> Let me know if you have other suggestions for this.
>>
>> I don't have, because I don't understand why do you want/need to change
>> existing board compatible.
> 
> We can left the current existing sa8775p board compatible as it is. And
> have a brand new qcs9100 and qcs9100-board item for current non-scmi
> resources compatible.
> 
> Will that be more reasonable from your end?

Yes, this is what I would expect. If you choose any other way - just
like I wrote - you need to explain why you are doing this.

Best regards,
Krzysztof

Re: [PATCH 29/47] dt-bindings: net: qcom,ethqos: add description for qcs9100

[Tengfei Fan]

On 7/5/2024 12:03 AM, Andrew Lunn wrote:
> On Thu, Jul 04, 2024 at 09:13:59AM +0800, Tengfei Fan wrote:
>>
>>
>> On 7/3/2024 11:09 PM, Andrew Halaney wrote:
>>> On Wed, Jul 03, 2024 at 10:58:32AM GMT, Tengfei Fan wrote:
>>>> Add the compatible for the MAC controller on qcs9100 platforms. This MAC
>>>> works with a single interrupt so add minItems to the interrupts property.
>>>> The fourth clock's name is different here so change it. Enable relevant
>>>> PHY properties. Add the relevant compatibles to the binding document for
>>>> snps,dwmac as well.
>>>
>>> This description doesn't match what was done in this patch, its what
>>> Bart did when he made changes to add the sa8775 changes. Please consider
>>> using a blurb indicating that this is the same SoC as sa8775p, just with
>>> different firmware strategies or something along those lines?
>>
>> I will update this commit message as you suggested.
> 
> Hi Andrew, Tengfei
> 
> Please trim emails when replying to just the needed context.
> 
> Thanks
> 	Andrew

Thank you for pointing out this. In the future, I will pay attention to 
trimming emails when I reply.

-- 
Thx and BRs,
Tengfei Fan

Re: [PATCH 00/47] arm64: qcom: dts: add QCS9100 support

[Tengfei Fan]

On 7/3/2024 2:28 PM, Conor Dooley wrote:
> On Wed, Jul 03, 2024 at 06:45:00AM +0200, Krzysztof Kozlowski wrote:
>> On 03/07/2024 05:56, Tengfei Fan wrote:
>>> Introduce support for the QCS9100 SoC device tree (DTSI) and the
>>> QCS9100 RIDE board DTS. The QCS9100 is a variant of the SA8775p.
>>> While the QCS9100 platform is still in the early design stage, the
>>> QCS9100 RIDE board is identical to the SA8775p RIDE board, except it
>>> mounts the QCS9100 SoC instead of the SA8775p SoC.
>>
>> The same huge patchset, to huge number of recipients was sent twice.
>> First, sorry, this is way too big. Second, it has way too many
>> recipients, but this is partially a result of first point. Only
>> partially because you put here dozen of totally unrelated emails. Sorry,
>> that does not make even sense. See form letter at the end how this
>> works. Third, sending it to everyone twice is a way to annoy them off
>> twice... Fourth,
>>
>> Please split your work and do not cc dozen of unrelated folks.
> 
> One of the extra recipients is cos that of that patch I sent adding the
> cache bindings to the cache entry, forgetting that that would CC the
> riscv list on all cache bindings. I modified that patch to drop the riscv
> list from the entry.
> 
> Cheers,
> Conor.


Thank you, Conor!

-- 
Thx and BRs,
Tengfei Fan