From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id ED54CC3DA79 for ; Wed, 21 Dec 2022 10:21:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234495AbiLUKVB (ORCPT ); Wed, 21 Dec 2022 05:21:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44114 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229472AbiLUKU6 (ORCPT ); Wed, 21 Dec 2022 05:20:58 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9644D9FE9; Wed, 21 Dec 2022 02:20:56 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 3AA066174D; Wed, 21 Dec 2022 10:20:56 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 90C76C433D2; Wed, 21 Dec 2022 10:20:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1671618055; bh=DvJnhNV9WpC0ryEBXj5Ow4+4ZKHs28oUPewt6p/MjKI=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=pkJGbZ5HH5ds2tTvxlmd8Lh5dMVoo9oOVtaJK+9Z7QnKJZRo0Z897P5v+FcOjyyMb 6uMkSGPNYwKfo3eBz0wxtSh8Pj9yFJZnv/5LMsDNi/Os2iM6XQkNhZp7lsAQH9xnkT Jewhzzt/wAoHCgSNxsDAHNf2XXYuZnSV7f1dcu/s/oEbgZ16uIuWzFMRvexu9HwXN0 Zasa1NOKKmUEpFbVFPk+3VcIHKtKNNqHEe8F7PRbZDbmopIEPhvqbvqT/wDUA0eSxx 3LeGczYrVFB2yngu52Ux8Mp2RTOyd3+F5b292KODFYxPwidOJb85mocmjIpIbtmboB D9dkq8HpvCVCQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1p7wDV-00E7hv-58; Wed, 21 Dec 2022 10:20:53 +0000 Date: Wed, 21 Dec 2022 10:20:52 +0000 Message-ID: <86o7rxawhn.wl-maz@kernel.org> From: Marc Zyngier To: Prabhakar Cc: Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Linus Walleij , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, Biju Das , Lad Prabhakar Subject: Re: [PATCH v2 4/9] irqchip: irq-renesas-rzg2l: Add support for RZ/G2UL SoC In-Reply-To: <20221221000242.340202-5-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20221221000242.340202-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20221221000242.340202-5-prabhakar.mahadev-lad.rj@bp.renesas.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: prabhakar.csengg@gmail.com, tglx@linutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, geert+renesas@glider.be, magnus.damm@gmail.com, linus.walleij@linaro.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Wed, 21 Dec 2022 00:02:37 +0000, Prabhakar wrote: > > From: Lad Prabhakar > > The IRQC block on RZ/G2UL SoC is almost identical to one found on the > RZ/G2L SoC the only difference being it can support BUS_ERR_INT for > which it has additional registers. > > This patch adds a new entry for "renesas,rzg2ul-irqc" compatible string > and now that we have interrupt-names property the driver code parses the > interrupts based on names and for backward compatibility we fallback to > parse interrupts based on index. > > For now we will be using rzg2l_irqc_init() as a callback for RZ/G2UL SoC > too and in future when the interrupt handler will be registered for > BUS_ERR_INT we will have to implement a new callback. > > Signed-off-by: Lad Prabhakar Since you're posting from a different address, please add a second SoB with your gmail address. > --- > v1 -> v2 > * New patch > --- > drivers/irqchip/irq-renesas-rzg2l.c | 80 ++++++++++++++++++++++++++--- > 1 file changed, 74 insertions(+), 6 deletions(-) > > diff --git a/drivers/irqchip/irq-renesas-rzg2l.c b/drivers/irqchip/irq-renesas-rzg2l.c > index 7918fe201218..5bdf0106ef51 100644 > --- a/drivers/irqchip/irq-renesas-rzg2l.c > +++ b/drivers/irqchip/irq-renesas-rzg2l.c > @@ -299,19 +299,86 @@ static const struct irq_domain_ops rzg2l_irqc_domain_ops = { > .translate = irq_domain_translate_twocell, > }; > > -static int rzg2l_irqc_parse_interrupts(struct rzg2l_irqc_priv *priv, > - struct device_node *np) > +static int rzg2l_irqc_parse_interrupt_to_fwspec(struct rzg2l_irqc_priv *priv, > + struct device_node *np, > + unsigned int index, > + unsigned int fwspec_index) > { > struct of_phandle_args map; > + int ret; > + > + ret = of_irq_parse_one(np, index, &map); > + if (ret) > + return ret; > + > + of_phandle_args_to_fwspec(np, map.args, map.args_count, > + &priv->fwspec[fwspec_index]); > + > + return 0; > +} > + > +static int rzg2l_irqc_parse_interrupt_by_name_to_fwspec(struct rzg2l_irqc_priv *priv, > + struct device_node *np, > + char *irq_name, > + unsigned int fwspec_index) > +{ > + int index; > + > + index = of_property_match_string(np, "interrupt-names", irq_name); > + if (index < 0) > + return index; > + > + return rzg2l_irqc_parse_interrupt_to_fwspec(priv, np, index, fwspec_index); > +} > + > +/* Parse hierarchy domain interrupts ie only IRQ0-7 and TINT0-31 */ > +static int rzg2l_irqc_parse_hierarchy_interrupts(struct rzg2l_irqc_priv *priv, > + struct device_node *np) > +{ > + struct property *pp; > unsigned int i; > int ret; > > + /* > + * first check if interrupt-names property exists if so parse them by name > + * or else parse them by index for backward compatibility. > + */ > + pp = of_find_property(np, "interrupt-names", NULL); > + if (pp) { > + char *irq_name; > + > + /* parse IRQ0-7 */ > + for (i = 0; i < IRQC_IRQ_COUNT; i++) { > + irq_name = kasprintf(GFP_KERNEL, "irq%d", i); > + if (!irq_name) > + return -ENOMEM; > + > + ret = rzg2l_irqc_parse_interrupt_by_name_to_fwspec(priv, np, irq_name, i); Am I the only one that find it rather odd to construct a name from an index, only to get another index back? In any case, the string stuff could be moved into rzg2l_irqc_parse_interrupt_by_name_to_fwspec(). Which could really do with a name shortening)... rzg2l_irqc_name_to_fwspec? Same thing for the other function (rzg2l_irqc_index_to_fwspec). M. -- Without deviation from the norm, progress is not possible.