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Tue, 28 Jul 2026 15:24:24 +0000 Date: Tue, 28 Jul 2026 16:24:23 +0100 Message-ID: <86v79zcf2w.wl-maz@kernel.org> From: Marc Zyngier To: Swark Yang Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Harshit Shah , Linus Walleij , Bartosz Golaszewski , Jan Kotas , Michal Simek , Andi Shyti , =?UTF-8?B?UHJ6ZW15c8WCYXc=?= Gaj , Alexandre Belloni , Frank Li , Boris Brezillon , Greg Kroah-Hartman , Jiri Slaby , Mark Brown , Mathias Nyman , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-i3c@lists.infradead.org, linux-serial@vger.kernel.org, linux-spi@vger.kernel.org, linux-usb@vger.kernel.org Subject: Re: [PATCH v3 8/8] arm64: dts: axiado: Add initial support for AX3005 SoC and eval board In-Reply-To: <20260716-upstream-axiado-ax3005-upstream-v3-8-c429095143ec@axiado.com> References: <20260716-upstream-axiado-ax3005-upstream-v3-0-c429095143ec@axiado.com> <20260716-upstream-axiado-ax3005-upstream-v3-8-c429095143ec@axiado.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: syang@axiado.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, hshah@axiado.com, linusw@kernel.org, brgl@kernel.org, jank@cadence.com, michal.simek@amd.com, andi.shyti@kernel.org, pgaj@cadence.com, alexandre.belloni@bootlin.com, Frank.Li@nxp.com, bbrezillon@kernel.org, gregkh@linuxfoundation.org, jirislaby@kernel.org, broonie@kernel.org, mathias.nyman@intel.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-i2c@vger.kernel.org, linux-i3c@lists.infradead.org, linux-serial@vger.kernel.org, linux-spi@vger.kernel.org, linux-usb@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Fri, 17 Jul 2026 04:51:15 +0100, Swark Yang wrote: > [...] > + soc { > + compatible = "simple-bus"; > + #address-cells = <2>; > + #size-cells = <2>; > + interrupt-parent = <&gic500>; > + ranges; > + > + gic500: interrupt-controller@40400000 { > + compatible = "arm,gic-v3"; > + reg = <0x0 0x40400000 0x0 0x10000>, > + <0x0 0x40500000 0x0 0xc0000>; This is missing the GICC, GICH and GICV regions that are implemented on Cortex-A53. See the binding document. > + ranges; > + #interrupt-cells = <3>; > + interrupt-controller; > + #address-cells = <2>; > + #size-cells = <2>; > + interrupts = ; > + #redistributor-regions = <1>; This is the default, and isn't required. M. -- Without deviation from the norm, progress is not possible.