[RFC] Periodic Output, Timestamped Input

[Felipe Balbi <felipe.balbi@linux.intel.com>]

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Hi Linus,

Before I put a lot of code down, I wanted to get a feeling from you as
to how you'd like two new features to be implemented.

In a future platform we may have two new features in our GPIO
controller which allows for periodic assertion of GPIO Output
(controlled by HW, we just program the interval) and Timestamping of
GPIO Input events.

I was thinking that we could use pin config for that. Something along
the lines of:

@@ -700,6 +700,12 @@ static int intel_config_set_debounce(struct intel_pinctrl *pctrl, unsigned pin,
	return ret;
 }

+static int intel_config_set_output_periodic(struct intel_pinctrl *pctrl,
+					    unsigned pin, unsigned period_ms)
+{
+	return 0;
+}
+
 static int intel_config_set(struct pinctrl_dev *pctldev, unsigned pin,
			  unsigned long *configs, unsigned nconfigs)
 {
@@ -726,6 +732,13 @@ static int intel_config_set(struct pinctrl_dev *pctldev, unsigned pin,
				return ret;
			break;

+		case PIN_CONFIG_OUTPUT_PERIODIC:
+			ret = intel_config_set_output_periodic(pctrl, pin,
+				pinconf_to_config_argument(configs[i]));
+			if (ret)
+				return ret;
+			break;
+
		default:
			return -ENOTSUPP;
		}
modified   include/linux/pinctrl/pinconf-generic.h
@@ -90,6 +90,9 @@
  * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to
  *	this parameter (on a custom format) tells the driver which alternative
  *	slew rate to use.
+ * @PIN_CONFIG_OUTPUT_PERIODIC: this will configure the pin as an
+ *	output periodic toggle. The argument is period in
+ *	microseconds.
  * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if
  *	you need to pass in custom configurations to the pin controller, use
  *	PIN_CONFIG_END+1 as the base offset.
@@ -117,6 +120,7 @@ enum pin_config_param {
	PIN_CONFIG_POWER_SOURCE,
	PIN_CONFIG_SLEEP_HARDWARE_STATE,
	PIN_CONFIG_SLEW_RATE,
+	PIN_CONFIG_OUTPUT_PERIODIC,
	PIN_CONFIG_END = 0x7F,
	PIN_CONFIG_MAX = 0xFF,
 };

As for timestamp of input, we would likely request the input as an IRQ
and use the IRQ to read whatever register, wherever it may be.

Do you have any comments about this? Should I go ahead with current
assumptions?

cheers

-- 
balbi

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