From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21B8BC64E7A for ; Tue, 1 Dec 2020 18:22:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B328421741 for ; Tue, 1 Dec 2020 18:22:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726884AbgLASW0 (ORCPT ); Tue, 1 Dec 2020 13:22:26 -0500 Received: from guitar.tcltek.co.il ([192.115.133.116]:48332 "EHLO mx.tkos.co.il" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726733AbgLASWZ (ORCPT ); Tue, 1 Dec 2020 13:22:25 -0500 Received: from tarshish (unknown [10.0.8.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx.tkos.co.il (Postfix) with ESMTPS id 0910B440069; Tue, 1 Dec 2020 20:21:36 +0200 (IST) References: <20201118231811.GH1853236@lunn.ch> <878sax6f43.fsf@tarshish> <20201119133429.GS1804098@lunn.ch> <877dqhfogp.fsf@tarshish> User-agent: mu4e 1.4.13; emacs 27.1 From: Baruch Siach To: Bartosz Golaszewski Cc: Andrew Lunn , Thierry Reding , Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= , Lee Jones , Linus Walleij , Gregory Clement , Sebastian Hesselbarth , Thomas Petazzoni , Chris Packham , Sascha Hauer , Ralph Sennhauser , linux-pwm@vger.kernel.org, linux-gpio , arm-soc Subject: Re: [PATCH 3/5] gpio: mvebu: add pwm support for Armada 8K/7K In-reply-to: Date: Tue, 01 Dec 2020 20:21:33 +0200 Message-ID: <87lfeho09e.fsf@tarshish> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Hi Bartosz, On Tue, Dec 01 2020, Bartosz Golaszewski wrote: > On Thu, Nov 19, 2020 at 2:47 PM Baruch Siach wrote: >> On Thu, Nov 19 2020, Andrew Lunn wrote: >> >> >> @@ -1200,6 +1235,13 @@ static int mvebu_gpio_probe(struct platform_device *pdev) >> >> >> >> >> >> devm_gpiochip_add_data(&pdev->dev, &mvchip->chip, mvchip); >> >> >> >> >> >> + /* Some MVEBU SoCs have simple PWM support for GPIO lines */ >> >> >> + if (IS_ENABLED(CONFIG_PWM)) { >> >> >> + err = mvebu_pwm_probe(pdev, mvchip, id); >> >> >> + if (err) >> >> >> + return err; >> >> >> + } >> >> >> + >> >> > >> >> > The existing error handling looks odd here. Why is there no goto >> >> > err_domain when probing the PWMs fails? I wonder if this a bug from me >> >> > from a long time again? >> >> >> >> What would you release under the err_domain label? As far as I can see >> >> all resources are allocated using devres, and released automatically on >> >> failure exit. >> > >> > The IRQ domain is still registers. So once the memory is automatically >> > freed, don't we have a potential use after free? >> >> This patch moves PWM registration before IRQ domain registration for >> another reason as mentioned in the commit log. So this might >> incidentally fix the bug. >> >> Would you prefer a separate patch for that with a 'Fixes: >> 757642f9a584e8' tag? > > Baruch: does this series conflict with the fix you sent? I'm thinking > about how to take it through the next and fixes trees. Yes, It conflicts. I can send in a single series v3 of the fix along with the other patches rebased on top. Would that work for you? Thanks, baruch -- ~. .~ Tk Open Systems =}------------------------------------------------ooO--U--Ooo------------{= - baruch@tkos.co.il - tel: +972.52.368.4656, http://www.tkos.co.il -