From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 417EFC433F5 for ; Fri, 18 Mar 2022 17:44:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239736AbiCRRpv (ORCPT ); Fri, 18 Mar 2022 13:45:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47478 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238668AbiCRRpv (ORCPT ); Fri, 18 Mar 2022 13:45:51 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F3E7E1FAA3E; Fri, 18 Mar 2022 10:44:31 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 42F9BB824B1; Fri, 18 Mar 2022 17:44:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id EE635C340E8; Fri, 18 Mar 2022 17:44:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1647625469; bh=Yel17+YGUIPsFPXXcsUfkRlEDGY7ldlZnUFhHc3cQPw=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=sOKaWg8DMVhBONoscKdx8z/Nuue8RGTH0Yue+H5spIiJtuvaGZ6SoPBfHh4EPUd2M WTr6kba6yQdG9bI1zT9ERS5pqHz419ctvoV0JLBb+HhFVRpayObI8EJWLlRqXdYRRd sDkRA27zCjPxzEU7sOqf4nzMvd0M9MVWIg4ceDaWgaPPJDnIxmeLbGBh69OEbBc2/O XEk0LkpNmuZ9LHCZCDe8AAVH3CT63gNe2NTpdvDZeB5IHLfmO9IMtarS7IyI3Ta25i +ACWlfobCRAIBowxC1BuBFgAtSCIP+NiFv65xf2Y/+IfOHO4BA0X27VcVMU1WghWjN OCbicGD50y9Yg== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1nVGeI-00FVvX-H7; Fri, 18 Mar 2022 17:44:26 +0000 Date: Fri, 18 Mar 2022 17:44:25 +0000 Message-ID: <87mthnxiiu.wl-maz@kernel.org> From: Marc Zyngier To: "Lad, Prabhakar" Cc: Lad Prabhakar , Thomas Gleixner , Rob Herring , Linus Walleij , Bartosz Golaszewski , Geert Uytterhoeven , Philipp Zabel , LKML , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "open list:GPIO SUBSYSTEM" , Linux-Renesas , Biju Das Subject: Re: [RFC PATCH v4 2/5] irqchip: Add RZ/G2L IA55 Interrupt Controller driver In-Reply-To: References: <20220317012404.8069-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20220317012404.8069-3-prabhakar.mahadev-lad.rj@bp.renesas.com> <87pmmky2tw.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: prabhakar.csengg@gmail.com, prabhakar.mahadev-lad.rj@bp.renesas.com, tglx@linutronix.de, robh+dt@kernel.org, linus.walleij@linaro.org, brgl@bgdev.pl, geert+renesas@glider.be, p.zabel@pengutronix.de, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, biju.das.jz@bp.renesas.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Fri, 18 Mar 2022 14:59:41 +0000, "Lad, Prabhakar" wrote: > > Hi Marc, > > Thank you for the review. > > On Thu, Mar 17, 2022 at 4:13 PM Marc Zyngier wrote: > > > > On Thu, 17 Mar 2022 01:24:01 +0000, > > Lad Prabhakar wrote: > > > > > > +static struct irq_chip irqc_chip = { > > > + .name = "rzg2l-irqc", > > > + .irq_eoi = rzg2l_irqc_eoi, > > > + .irq_mask = irq_chip_mask_parent, > > > + .irq_unmask = irq_chip_unmask_parent, > > > + .irq_disable = rzg2l_irqc_irq_disable, > > > + .irq_enable = rzg2l_irqc_irq_enable, > > > > So this looks a bit odd. irq_mask only calls the parent and does nothing > > locally, while irq_disable does something locally and calls into the > > parent. If the parent is a GIC, this is turned into a mask (GIC has no > > notion of disabled). > > > My understanding for enable callback is one time call during irq setup > and for the disable callback it will be called during irq shutdown. > During enable/disable callback we config the required registers. > For mask callback this will be called when an interrupt occurs and for > unmask we want to re-enable the interrupt. Since there are no specific > registers to mask/unmask on RZ/G2L the callbacks point to > irq_chip_mask_parent/irq_chip_unmask_parent. > > I could move all the code from enable/disable callbacks to mask/unmask > callbacks and drop setting irq_enable/irq_disable completely. Please > let me know what should be the correct approach. I'm OK with your current setup, but I just wanted to check that this was your understanding as well. M. -- Without deviation from the norm, progress is not possible.