From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3CF5EC433EF for ; Sat, 16 Jul 2022 17:52:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229687AbiGPRwN (ORCPT ); Sat, 16 Jul 2022 13:52:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53164 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229505AbiGPRwM (ORCPT ); Sat, 16 Jul 2022 13:52:12 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A40961D0EC; Sat, 16 Jul 2022 10:52:11 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 56CC5B80AE9; Sat, 16 Jul 2022 17:52:10 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 03028C34114; Sat, 16 Jul 2022 17:52:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1657993929; bh=iqu3rkydelm0KKLKQ5YeCd4EC73OQHGk7AtlP5F9YEs=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=nH8NybBjCX6WrXzKRm8829a5kuM1oOCe010SVjzv5f3KuLYCGlSUzlAjE2DdEWIoE qkVYlHHoLLOZVJRoVRRLQO2NMxWyKpeYq6/P+5UUVUJo58m+ImRjRkmzsgRiwVSRMl VOLtdaR6CSDwGD1Xrl18EjEQsRDJYbYopMVYFgRXQklsUCUDDwlqTye3MiZ93TArlv V9s494R/t9GIx38+L50ySP/iTyYleYsX782U+6ebaDyc0sRE0iSibyw7e/v8E4MbCS OPItM4YagvO8VSWhNJdAmjBRekStBwMhiFQKaJ21U+exwYoG94RjMUeooA7c+H7A7K mOKD0s1V8/sGw== Received: from ip-185-104-136-29.ptr.icomera.net ([185.104.136.29] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1oClxW-007u1C-Lh; Sat, 16 Jul 2022 18:52:06 +0100 Date: Sat, 16 Jul 2022 18:52:01 +0100 Message-ID: <87o7xp3pz2.wl-maz@kernel.org> From: Marc Zyngier To: Cc: , , , , , , , Subject: Re: [PATCH v3 1/1] gpio: mpfs: add polarfire soc gpio support In-Reply-To: <2d7f72d3e89686d3ba5cff5df8cfe443d04fc5f4.camel@microchip.com> References: <20220716071113.1646887-1-lewis.hanly@microchip.com> <20220716071113.1646887-2-lewis.hanly@microchip.com> <87r12l4aaj.wl-maz@kernel.org> <2d7f72d3e89686d3ba5cff5df8cfe443d04fc5f4.camel@microchip.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.104.136.29 X-SA-Exim-Rcpt-To: Lewis.Hanly@microchip.com, linux-riscv@lists.infradead.org, Conor.Dooley@microchip.com, brgl@bgdev.pl, linux-gpio@vger.kernel.org, linus.walleij@linaro.org, palmer@dabbelt.com, linux-kernel@vger.kernel.org, Daire.McNamara@microchip.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On Sat, 16 Jul 2022 16:21:48 +0100, wrote: > > Thanks Marc, > > On Sat, 2022-07-16 at 11:33 +0100, Marc Zyngier wrote: > > EXTERNAL EMAIL: Do not click links or open attachments unless you > > know the content is safe > > > > On Sat, 16 Jul 2022 08:11:13 +0100, > > wrote: > > > From: Lewis Hanly > > > > > > Add a driver to support the Polarfire SoC gpio controller. > > > > > > Signed-off-by: Lewis Hanly > > > > [...] > > > > > +static int mpfs_gpio_child_to_parent_hwirq(struct gpio_chip *gc, > > > + unsigned int child, > > > + unsigned int child_type, > > > + unsigned int *parent, > > > + unsigned int *parent_type) > > > +{ > > > + struct mpfs_gpio_chip *mpfs_gpio = gpiochip_get_data(gc); > > > + struct irq_data *d = irq_get_irq_data(mpfs_gpio- > > > >irq_number[child]); > > > > This looks totally wrong. It means that you have already instantiated > > part of the hierarchy, and it is likely that you will get multiple > > hierarchy sharing some levels, which isn't intended. > > Some background why I use the above. > We need to support both direct and non-direct IRQ connections to the > PLIC. > In direct mode the GPIO IRQ's are connected directly to the PLIC and > certainly no need for the above. GPIO's can also be configured in non- > direct, which means they use a shared IRQ, hence the above. That's unfortunately not acceptable. You need to distinguish which one is which, and separate them. Your non-direct mode certainly requires special handling, and is not fit for a hierarchical mode. M. -- Without deviation from the norm, progress is not possible.