Linux GPIO subsystem development
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From: Thomas Gleixner <tglx@kernel.org>
To: Maulik Shah <maulik.shah@oss.qualcomm.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Linus Walleij <linusw@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-gpio@vger.kernel.org,
	Sneh Mankad <sneh.mankad@oss.qualcomm.com>,
	Maulik Shah <maulik.shah@oss.qualcomm.com>
Subject: Re: [PATCH v2 5/8] irqchip/qcom-pdc: Configure PDC to pass through mode
Date: Wed, 03 Jun 2026 17:36:22 +0200	[thread overview]
Message-ID: <87zf1b63gp.ffs@fw13> (raw)
In-Reply-To: <20260526-hamoa_pdc-v2-5-f6857af1ce91@oss.qualcomm.com>

On Tue, May 26 2026 at 16:24, Maulik Shah wrote:
 
> +static inline bool pdc_pin_uses_seconary_mode(int pin_out)
> +{
> +	if (pdc->mode == PDC_SECONDARY_MODE && pin_out >= pdc->num_spis)
> +		return true;

  return pdcc>mode == ... && ...;

Perhaps?

> +static void qcom_pdc_ack(struct irq_data *d)
> +{
> +	if (pdc_pin_uses_seconary_mode(d->hwirq) && !irqd_is_level_type(d))
> +		pdc->clear_gpio(d->hwirq);
> +}
> +
> +static void qcom_pdc_gic_eoi(struct irq_data *d)
> +{
> +	if (pdc_pin_uses_seconary_mode(d->hwirq) && irqd_is_level_type(d))
> +		pdc->clear_gpio(d->hwirq);
> +
> +	irq_chip_eoi_parent(d);
> +}

Not that I care about the performance of your SoC, but those
conditionals can be completely avoided with separate irq chips.


  parent reply	other threads:[~2026-06-03 15:36 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-26 10:54 [PATCH v2 0/8] x1e80100: Enable PDC wake GPIOs and deepest idle state Maulik Shah
2026-05-26 10:54 ` [PATCH v2 1/8] irqchip/qcom-pdc: restructure version support Maulik Shah
2026-06-03 15:33   ` Thomas Gleixner
2026-05-26 10:54 ` [PATCH v2 2/8] irqchip/qcom-pdc: Move all statics to struct pdc_desc Maulik Shah
2026-06-03 15:24   ` Thomas Gleixner
2026-05-26 10:54 ` [PATCH v2 3/8] irqchip/qcom-pdc: Remove pdc_enable_intr() wrapper Maulik Shah
2026-05-26 12:34   ` Stephan Gerhold
2026-06-03 15:25   ` Thomas Gleixner
2026-05-26 10:54 ` [PATCH v2 4/8] irqchip/qcom-pdc: Differentiate between direct SPI and GPIO as SPI Maulik Shah
2026-06-03 15:27   ` Thomas Gleixner
2026-05-26 10:54 ` [PATCH v2 5/8] irqchip/qcom-pdc: Configure PDC to pass through mode Maulik Shah
2026-05-26 12:22   ` Stephan Gerhold
2026-06-03 15:36   ` Thomas Gleixner [this message]
2026-05-26 10:54 ` [PATCH v2 6/8] pinctrl: qcom: Acknowledge IRQs for PDC interrupt controller Maulik Shah
2026-05-26 10:54 ` [PATCH v2 7/8] Revert "pinctrl: qcom: x1e80100: Bypass PDC wakeup parent for now" Maulik Shah
2026-05-26 10:54 ` [PATCH v2 8/8] arm64: dts: qcom: x1e80100: Add deepest idle state Maulik Shah
2026-05-26 11:59 ` [PATCH v2 0/8] x1e80100: Enable PDC wake GPIOs and " Stephan Gerhold

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