Re: [PATCH v9 char-misc-next 1/2] misc: microchip: pci1xxxx: Add support to read and write into PCI1XXXX OTP via NVMEM sysfs

[Michael Walle <michael@walle.cc>]

Am 2023-04-17 14:47, schrieb VaibhaavRam.TL@microchip.com:
>> > +#include <linux/auxiliary_bus.h>
>> > +#include <linux/bio.h>
>> > +#include <linux/device.h>
>> > +#include <linux/iopoll.h>
>> > +#include <linux/kthread.h>
>> 
>> Is this needed? I don't see any threads. Also bio.h. Please double
>> check
>> your includes.
> Ok, Will remove in next version of patch
>> > +     if (priv != NULL)
>> > +             rb = priv->reg_base;
>> > +     else
>> > +             return -ENODEV;
>> 
>> Unneeded check, priv cannot be NULL, right?
> Ok, I think this can be removed
>> > +
>> > +             data = readl(rb +
>> > MMAP_OTP_OFFSET(OTP_PASS_FAIL_OFFSET));
>> > +             if (ret < 0 || data & OTP_FAIL_BIT)
>> > +                     break;
>> 
>> No error handling?
> We have implemented short read which returns count of successful bytes
> read and therefore userspace will recognise the situation when the
> requested count is not obtained.

I'll leave that up to Greg, but I'd prefer a proper error to userspace.
I'm not sure if you'd need to differentiate between a short read/write
and an error.

Maybe a short read or write is a valid situation where an access which
leads to the OTP_FAIL_BIT is for sure an error situation.

-michael