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Tue, 08 Sep 2026 06:27:41 -0700 (PDT) Message-ID: <8f6cbccf-3169-4b32-9c8b-406d53449590@riscstar.com> Date: Tue, 8 Sep 2026 08:27:40 -0500 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 1/5] dt-bindings: PCI: toshiba,tc9563: Document embedded GPIO controller To: Lorenzo Bianconi , Bjorn Helgaas , Lorenzo Pieralisi , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chaitanya Chundru , Linus Walleij , Bartosz Golaszewski , Bjorn Andersson , Konrad Dybcio , Michael Walle Cc: Daniel Thompson , Sushrut Shree Trivedi , linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-msm@vger.kernel.org References: <20260904-pci-tc9563-aux-v3-0-5b1449d62ba2@oss.qualcomm.com> <20260904-pci-tc9563-aux-v3-1-5b1449d62ba2@oss.qualcomm.com> Content-Language: en-US From: Alex Elder In-Reply-To: <20260904-pci-tc9563-aux-v3-1-5b1449d62ba2@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 9/4/26 12:15 PM, Lorenzo Bianconi wrote: > The TC9563 PCIe switch embeds a GPIO controller providing 37 GPIO > lines. The controller is registered as an auxiliary device by the TC9563 > power controller and accessed through the same register map. s/power controller/power controller driver/ On the other hand, this is a devicetree binding, which should really focus on the hardware, not the software. The auxiliary device and the regmap are software constructs that aren't hardware-related. I think this description should focus on the fact that the TC9563 SoC (which contains the PCIe switch) *also* has a GPIO controller that is managed via the same I2C interface. And that it's possible the description within the binding should be modified that way as well. (However please defer to any input provided by the devicetree maintainers...) > Describe the switch node itself as the embedded GPIO controller and s/as the/as implementing an/ > document the per-port reset-gpios property. > > Signed-off-by: Lorenzo Bianconi I will let the devicetree maintainers comment on the way you document your properties. -Alex > --- > .../devicetree/bindings/pci/toshiba,tc9563.yaml | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml b/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml > index f084830c6d0c..c4cd162cb084 100644 > --- a/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml > +++ b/Documentation/devicetree/bindings/pci/toshiba,tc9563.yaml > @@ -31,6 +31,11 @@ properties: > description: > GPIO controlling the RESX# pin. > > + gpio-controller: true > + > + '#gpio-cells': > + const: 2 > + > vdd18-supply: true > > vdd09-supply: true > @@ -84,6 +89,11 @@ $defs: > type: object > > properties: > + reset-gpios: > + maxItems: 1 > + description: > + GPIO controlling the reset line connected to the downstream port. > + > toshiba,tx-amplitude-microvolt: > description: > Change Tx Margin setting for low power consumption. > @@ -128,7 +138,7 @@ examples: > ranges; > bus-range = <0x01 0xff>; > > - pcie@0,0 { > + tc9563: pcie@0,0 { > compatible = "pci1179,0623"; > > reg = <0x10000 0x0 0x0 0x0 0x0>; > @@ -149,6 +159,9 @@ examples: > > resx-gpios = <&gpio 1 GPIO_ACTIVE_LOW>; > > + gpio-controller; > + #gpio-cells = <2>; > + > pcie@1,0 { > compatible = "pciclass,0604"; > reg = <0x20800 0x0 0x0 0x0 0x0>; > @@ -158,6 +171,8 @@ examples: > ranges; > bus-range = <0x03 0xff>; > > + reset-gpios = <&tc9563 2 GPIO_ACTIVE_LOW>; > + > toshiba,no-dfe-support; > }; > > @@ -170,6 +185,8 @@ examples: > ranges; > bus-range = <0x04 0xff>; > > + reset-gpios = <&tc9563 3 GPIO_ACTIVE_LOW>; > + > toshiba,tx-amplitude-microvolt = <10>; > }; > >