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AJvYcCUkhLb0V9QtqSQ0jDwhFsjoS/NFfO52KjsAOKLtWwKUluuv8n6SKkn03Llj5amzL113Y8DapAO0KV3T@vger.kernel.org X-Gm-Message-State: AOJu0YwwbCe8Yp0rvlbOMSt8FDGeu1G2YixJuSsZ11xzcdFg/2ZuTvQe 3OZQ4huQv97z/I8qAGGz04zyEYuuSX0JDXN4/kFC/GTrNzy/qEOa0Mrtl61+Odw= X-Gm-Gg: ASbGncte+ZLYR8ibmBhgjlINeX0fiDw8AWZjfJkv5NHC6hG6cjLMc8gwTbJXsuoj/Xw N9+SGSZoNBAfGnNkqQCSOfV/PU3Uv/aN05+y9zeR3e5rfgiZunLvO9YylH6DIW72N2Vv85vu0EM jQ1q2LOP1/JTuE9hX9ipZ5JHNON010NaGQtpMIKFy0DV8OlZZNkEcVud/K2MF6QN+b47secG3rH I+c7GH5FPKRgL5K6DrodQZxj20zj2PNZgdDFntnYgCXbiJXyhm/PjIA1tA= X-Google-Smtp-Source: AGHT+IHdIFr9jhhsBk3LA/yMhIo1sPstspknh/fJv6TIYCYORpTOtn3BgFqoQz0uOcxmOjnzfBpxdw== X-Received: by 2002:a17:906:4c2:b0:a9a:ad8:fc56 with SMTP id a640c23a62f3a-aa63a2083d8mr1026209966b.44.1733746928786; Mon, 09 Dec 2024 04:22:08 -0800 (PST) Received: from [192.168.50.4] ([82.78.167.161]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-aa699618041sm39442266b.81.2024.12.09.04.22.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 09 Dec 2024 04:22:08 -0800 (PST) Message-ID: <91c80c8e-729d-46ac-bb05-2cdcdb95ba1e@tuxon.dev> Date: Mon, 9 Dec 2024 14:22:06 +0200 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 02/25] clk: versaclock3: Prepare for the addition of 5L35023 device Content-Language: en-US To: Geert Uytterhoeven Cc: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com, lgirdwood@gmail.com, broonie@kernel.org, magnus.damm@gmail.com, linus.walleij@linaro.org, perex@perex.cz, tiwai@suse.com, p.zabel@pengutronix.de, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sound@vger.kernel.org, linux-gpio@vger.kernel.org, Claudiu Beznea References: <20241113133540.2005850-1-claudiu.beznea.uj@bp.renesas.com> <20241113133540.2005850-3-claudiu.beznea.uj@bp.renesas.com> From: Claudiu Beznea In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hi, Geert, On 09.12.2024 14:16, Geert Uytterhoeven wrote: > Hi CLaudiu, > > On Mon, Dec 9, 2024 at 12:14 PM Claudiu Beznea wrote: >> On 09.12.2024 12:57, Geert Uytterhoeven wrote: >>> On Wed, Nov 13, 2024 at 2:35 PM Claudiu wrote: >>>> From: Claudiu Beznea >>>> >>>> The 5P35023 and 5L35035 Versa 3 clock generator variants are different but >>>> the versaclock3 driver could be used with small adjustments. The features >>>> that are implemented in driver and differs b/w variants are the PLL2 Fvco >>>> and clock sel bit for SE2 clock. Adjust the driver to prepare for the >>>> addition of 5L35023 device. >>>> >>>> Reviewed-by: Biju Das >>>> Signed-off-by: Claudiu Beznea >>> >>> Thanks for your patch! >>> >>>> --- a/drivers/clk/clk-versaclock3.c >>>> +++ b/drivers/clk/clk-versaclock3.c >>>> @@ -166,12 +167,17 @@ struct vc3_div_data { >>>> struct vc3_hw_data { >>>> struct clk_hw hw; >>>> struct regmap *regmap; >>>> - const void *data; >>>> + void *data; >>>> >>>> u32 div_int; >>>> u32 div_frc; >>>> }; >>> >>>> @@ -698,8 +706,6 @@ static struct vc3_hw_data clk_pll[] = { >>>> .num = VC3_PLL2, >>>> .int_div_msb_offs = VC3_PLL2_FB_INT_DIV_MSB, >>>> .int_div_lsb_offs = VC3_PLL2_FB_INT_DIV_LSB, >>>> - .vco_min = VC3_PLL2_VCO_MIN, >>>> - .vco_max = VC3_PLL2_VCO_MAX >>>> }, >>>> .hw.init = &(struct clk_init_data) { >>>> .name = "pll2", >>> >>>> @@ -1029,9 +1037,16 @@ static int vc3_probe(struct i2c_client *client) >>>> clk_pfd[i].hw.init->name); >>>> } >>>> >>>> + data = i2c_get_match_data(client); >>>> + >>>> /* Register pll's */ >>>> for (i = 0; i < ARRAY_SIZE(clk_pll); i++) { >>>> clk_pll[i].regmap = regmap; >>>> + if (i == VC3_PLL2) { >>>> + struct vc3_pll_data *pll_data = clk_pll[i].data; >>>> + >>>> + pll_data->vco = data->pll2_vco; >>> >>> You cannot modify the global clk_pll[] data, as it is shared when >>> there are multiple instances. >> >> By "multiple instances" do you mean, multiple versa3 devices using this >> driver? Do you know if we have such a board integrated, ATM? > > Exactly. > Currently there are no such (upstream) users for 5p35023, > but e.g. the Beacon RZ/G2M kit has two 5p49v6965 instances. Are you OK with keeping it as is for the RZ/G3S SSIF support and returning back later with a solution for the scenario you pointed out? Although, ATM, I don't have a board to test it. Thank you, Claudiu > > Gr{oetje,eeting}s, > > Geert >