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Wed, 12 Nov 2025 01:13:18 -0800 (PST) Message-ID: <96a30c1236cbca467b4f152e54b46ea290cb134e.camel@gmail.com> Subject: Re: [PATCH v2 1/2] dt-bindings: gpio: adg1712: add adg1712 support From: Nuno =?ISO-8859-1?Q?S=E1?= To: Antoniu Miclaus , Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Date: Wed, 12 Nov 2025 09:13:56 +0000 In-Reply-To: <20251108174055.3665-2-antoniu.miclaus@analog.com> References: <20251108174055.3665-1-antoniu.miclaus@analog.com> <20251108174055.3665-2-antoniu.miclaus@analog.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.58.1 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Sat, 2025-11-08 at 17:40 +0000, Antoniu Miclaus wrote: > Add devicetree bindings for adg1712 SPST quad switch. >=20 > Signed-off-by: Antoniu Miclaus > --- > Changes in v2: > - Replace individual GPIO properties (switch1-gpios, switch2-gpios, etc.) > =C2=A0 with a single GPIO array property (switch-gpios) > - Update required properties list accordingly > - Simplify device tree example to use array notation > --- Antoniu, See the discussion in [1] and reply there. Linus gave a suggestion on how this could be implemented. See if it fits the usecases this chip is being used and if not we need to discuss alternatives or if we can allow=C2=A0 gpiochip .set()/.get() [1]: https://lore.kernel.org/linux-gpio/20251031160710.13343-1-antoniu.micl= aus@analog.com/T/#m3f4397526ee7cb2a737a30673934578b3b290c1c - Nuno S=C3=A1 > =C2=A0.../devicetree/bindings/gpio/adi,adg1712.yaml | 65 ++++++++++++++++= +++ > =C2=A01 file changed, 65 insertions(+) > =C2=A0create mode 100644 Documentation/devicetree/bindings/gpio/adi,adg17= 12.yaml >=20 > diff --git a/Documentation/devicetree/bindings/gpio/adi,adg1712.yaml > b/Documentation/devicetree/bindings/gpio/adi,adg1712.yaml > new file mode 100644 > index 000000000000..d6000a788d6e > --- /dev/null > +++ b/Documentation/devicetree/bindings/gpio/adi,adg1712.yaml > @@ -0,0 +1,65 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/gpio/adi,adg1712.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Analog Devices ADG1712 quad SPST switch GPIO controller > + > +maintainers: > +=C2=A0 - Antoniu Miclaus > + > +description: | > +=C2=A0 Bindings for Analog Devices ADG1712 quad single-pole, single-thro= w (SPST) > +=C2=A0 switch controlled by GPIOs. The device features four independent = switches, > +=C2=A0 each controlled by a dedicated GPIO input pin. > + > +=C2=A0 Each GPIO line exposed by this controller corresponds to one of t= he four > +=C2=A0 switches (SW1-SW4) on the ADG1712. Setting a GPIO line high enabl= es the > +=C2=A0 corresponding switch, while setting it low disables the switch. > + > +properties: > +=C2=A0 compatible: > +=C2=A0=C2=A0=C2=A0 const: adi,adg1712 > + > +=C2=A0 switch-gpios: > +=C2=A0=C2=A0=C2=A0 description: | > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Array of GPIOs connected to the IN1-IN4 c= ontrol pins. > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Index 0 corresponds to IN1 (controls SW1)= , > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Index 1 corresponds to IN2 (controls SW2)= , > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Index 2 corresponds to IN3 (controls SW3)= , > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Index 3 corresponds to IN4 (controls SW4)= . > +=C2=A0=C2=A0=C2=A0 minItems: 4 > +=C2=A0=C2=A0=C2=A0 maxItems: 4 > + > +=C2=A0 gpio-controller: true > + > +=C2=A0 "#gpio-cells": > +=C2=A0=C2=A0=C2=A0 const: 2 > +=C2=A0=C2=A0=C2=A0 description: | > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 The first cell is the GPIO number (0-3 co= rresponding to SW1-SW4). > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 The second cell specifies GPIO flags. > + > +required: > +=C2=A0 - compatible > +=C2=A0 - switch-gpios > +=C2=A0 - gpio-controller > +=C2=A0 - "#gpio-cells" > + > +additionalProperties: false > + > +examples: > +=C2=A0 - | > +=C2=A0=C2=A0=C2=A0 #include > + > +=C2=A0=C2=A0=C2=A0 adg1712: gpio-expander { > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 compatible =3D "adi,adg1712"; > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 gpio-controller; > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 #gpio-cells =3D <2>; > + > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 switch-gpios =3D <&gpio 10 GP= IO_ACTIVE_HIGH>, > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 <&gpio 11 GPIO= _ACTIVE_HIGH>, > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 <&gpio 12 GPIO= _ACTIVE_HIGH>, > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 <&gpio 13 GPIO= _ACTIVE_HIGH>; > +=C2=A0=C2=A0=C2=A0 }; > +...