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Wed, 03 Jun 2026 19:02:51 -0700 (PDT) X-Received: by 2002:a05:6a20:728d:b0:39f:9eb3:1d09 with SMTP id adf61e73a8af0-3b49766b7f2mr6538631637.37.1780538570626; Wed, 03 Jun 2026 19:02:50 -0700 (PDT) Received: from [10.239.155.28] ([114.94.8.21]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c85deeb2bdesm3413401a12.0.2026.06.03.19.02.45 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 03 Jun 2026 19:02:50 -0700 (PDT) Message-ID: <9927f5d7-1eca-4936-b38c-678e76ac11cb@oss.qualcomm.com> Date: Thu, 4 Jun 2026 10:02:43 +0800 Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/4] soc: qcom: rpmh: Allow non-child devices to issue write commands From: Fenglin Wu To: Dmitry Baryshkov Cc: linux-arm-msm@vger.kernel.org, Bjorn Andersson , Konrad Dybcio , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , David Collins , Subbaraman Narayanamurthy , Kamal Wadhwa , Maulik Shah , kernel@oss.qualcomm.com, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org References: <20260528-pinctrl-level-shifter-v2-0-3a6a025392bf@oss.qualcomm.com> <20260528-pinctrl-level-shifter-v2-1-3a6a025392bf@oss.qualcomm.com> <4ac5hjmr6divqs4myhcw5sveuboj265sw2jwslbivrfwh5e7ce@6d7ajvgikkgt> <18235340-cd42-4d88-bfdb-19aecdd63d68@oss.qualcomm.com> Content-Language: en-US In-Reply-To: <18235340-cd42-4d88-bfdb-19aecdd63d68@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: O3rNRtz-KfiKRwJCi3jlTYRs-9z-7w8x X-Proofpoint-GUID: O3rNRtz-KfiKRwJCi3jlTYRs-9z-7w8x X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjA0MDAxNyBTYWx0ZWRfXyRSZ7g+DfZzb WGhBIXDRFj3nwQCtG8VgwiMudAcnglPGCGiNXNAQOu4rpXcHuW5GX8okuuBxsqrN1vyP6envQae hC7Jix0Ui8Rbq3jaX3l5Q9d6NNJ05ldjB+70oKSGcKl4Dp9fGWcMLQxQc5Zy03SN1BxTcHzatpV sHtpTjf62O+KJQLjspDlJ+KVZyOKrQI/nXXyz1QgLY6dApVQJGGh526RNRKvwBtMk7orrT6xPnO CM/kfTw13nCNIBQ/A78iY3zdHuAJTxG61Fb+8uSvYDrJnjCIMrPFYlqsKX+JTohmtfhjCBtVtrg X5xP99RuORLHp7lkxxBpzil3MB9IuRweUTbfrkJ5beiE1WfYvgipN6nccnuPMY3Ej+DTGNSKN+H 6fGYMMe2lT7HzGCKv/GLjLLsaNTLldaHAb1eaTFM8MAiQ78aNJNHYfEos/Sas/1gtDf7biUy1u1 ZojkPAg/Vo0nn2YevVw== X-Authority-Analysis: v=2.4 cv=f4p4wuyM c=1 sm=1 tr=0 ts=6a20dccb cx=c_pps a=Oh5Dbbf/trHjhBongsHeRQ==:117 a=Uz3yg00KUFJ2y2WijEJ4bw==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=m7le24t4bVehakb2-XAA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=_Vgx9l1VpLgwpw_dHYaR:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-04_01,2026-05-28_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 phishscore=0 bulkscore=0 clxscore=1015 adultscore=0 priorityscore=1501 impostorscore=0 malwarescore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605210000 definitions=main-2606040017 On 6/2/2026 3:29 PM, Fenglin Wu wrote: > > On 6/1/2026 9:37 PM, Dmitry Baryshkov wrote: >> On Thu, May 28, 2026 at 06:05:35PM -0700, Fenglin Wu wrote: >>> Currently, the RPMH driver only allows child devices of the RPMH >>> controller to issue commands, as it assumes dev->parent points to the >>> RSC device. >>> >>> There is a possibility that certain devices which are not children of >>> the RPMH controller want to send commands for special control at the >>> RPMH side. For example, in PMH0101 PMICs, there are bidirectional >>> level shifter (LS) peripherals, and each LS works with a pair of PMIC >>> GPIOs. The control of the LS, which is combined with the GPIO >>> configuration, is handled by RPMH firmware for sharing the resource >>> between different subsystems. From a hardware point of view, the LS >>> functionality is tied to a pair of PMIC GPIOs, so its control is more >>> suitable to be added in the pinctrl-spmi-gpio driver by adding the >>> level-shifter function. However, the pinctrl-spmi-gpio device is a >>> child device of the SPMI controller, not the RPMH controller. >> This replicates the story of the PMIC regulators. There are two drivers, >> one SPMI and one RPMh. Why don't we add a separate, RPMh-based GPIO >> driver targeting only those paired GPIOs (and we don't even need to >> represent them as a pair, it might be just one pin). > > Thanks for the suggestion. > > I agree that adding a separate, RPMh-based GPIO driver would be more > straightforward from RPMh control perspective. It makes the new device > as a child of the RSC device then it can naturally use the APIs for > RPMh commands. The main challenge here is, we need to make the > level-shifter mutually exclusive with other GPIO functions when the > GPIO pairs are used in level-shifter function, which means we need to > write SPMI commands to disable the associated GPIO modules. I am not > sure if AOP already handles this; as far as I know, AOP only manages > the BIDIR_LVL_SHIFTER module registers. Let me double check on this > internally, if the GPIO modules could be controlled along > with BIDIR_LVL_SHIFTER module registers at AOP side, and get back. > I checked on this internally, AOP only handles BIDIR_LVL_SHIFTER module registers, it doesn't disable the associated GPIO modules. Also, I still have no idea how could we make the "level-shifter" function to be mutually exclusive with other GPIO functions after moved it into a separate driver. Do you have further suggestions?