From: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
To: Linus Walleij <linusw@kernel.org>
Cc: Conor Dooley <conor@kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Magnus Damm <magnus.damm@gmail.com>,
linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
Biju Das <biju.das.jz@bp.renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH 1/2] dt-bindings: pinctrl: renesas,r9a09g077: Document pin configuration properties
Date: Fri, 12 Dec 2025 11:11:30 +0000 [thread overview]
Message-ID: <CA+V-a8uEk_SYcbukBNz_sm7-giuGeg8V7kMUtXsiOYfbFFR90Q@mail.gmail.com> (raw)
In-Reply-To: <CAD++jL=rp=_J7vN4E9hUqu0Fa4H+1E1EhMFAe79Tc8jMtNHTcA@mail.gmail.com>
Hi Linus,
Thank you for the review.
On Thu, Dec 11, 2025 at 12:00 AM Linus Walleij <linusw@kernel.org> wrote:
>
> Hi Lad,
>
> thanks for your patch!
>
> On Mon, Dec 8, 2025 at 7:01 PM Conor Dooley <conor@kernel.org> wrote:
> > On Mon, Dec 08, 2025 at 10:36:04AM +0000, Lad, Prabhakar wrote:
>
> > > > > > + slew-rate:
> > > > > > + enum: [0, 1]
> > > > >
> > > > > What are the meanings of "0" and "1" for slew rate? Why isn't this given
> > > > I'll add a description for it (0 = slow, 1 = fast) and the same values
> > > > are programmed in the register to configure the slew rate.
> > > >
> > > > > as the actual rates? The docs surely give more detail than just "slow"
> > > > > and "fast".
> > > > You mean to represent slew-rate in some sort of a unit?
> > > >
> > > Based on the comments from the HW team, there is no numerical
> > > definition to represent slow/fast It only defines a relative
> > > relationship.
>
> Then describe relative to what, so we can understand when to use
> which setting?
>
I have made a query regarding this to the HW team. I'll respond as
soon as I get any feedback.
> > > The current value is determined by the load on the external circuit
> > > and is not affected by the choice of drive strength.
> (...)
> > Remember, drive strength is the current that can be delivered through a
> > pin, not how much it is delivering at a given point in time.
>
> This seems to be the core of the misunderstanding here.
>
> The setting defines the cap. How much current *can* be delivered.
>
> If the pin controller had a fuse that would bust if we delivered too
> much current, this would be the grading of that fuse.
>
> It's the current where the driver stage(s) stop pushing in more
> electrons, it's a very real thing and does not depend on what the
> circuit look like.
>
> Pins usually have protected driver stages, so connecting an
> amperemeter directly to ground and driving the line high would
> actually give this value.
>
Agreed.
Cheers,
Prabhakar
next prev parent reply other threads:[~2025-12-12 11:12 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-14 19:11 [PATCH 0/2] Add support for configuring pin properties on RZ/T2H-N2H SoCs Prabhakar
2025-10-14 19:11 ` [PATCH 1/2] dt-bindings: pinctrl: renesas,r9a09g077: Document pin configuration properties Prabhakar
2025-10-16 16:41 ` Conor Dooley
2025-10-17 15:33 ` Lad, Prabhakar
2025-10-17 15:45 ` Conor Dooley
2025-12-08 10:36 ` Lad, Prabhakar
2025-12-08 18:00 ` Conor Dooley
2025-12-11 0:00 ` Linus Walleij
2025-12-12 11:11 ` Lad, Prabhakar [this message]
2025-10-20 21:25 ` Linus Walleij
2025-10-14 19:11 ` [PATCH 2/2] pinctrl: renesas: rzt2h: Add pin configuration support Prabhakar
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